Bibhash Sen
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Abstract
Reversible logic is emerging as a prospective logic design style for implementing ultra-low-power VLSI circuits. It promises low-power consuming circuits by nullifying the energy dissipation in irreversible logic. On the other hand, as a potential alternative to CMOS technology, Quantum-dot Cellular Automata (QCA) promises energy efficient digital design with high device density and high computing speed. The integration of reversible logic in QCA circuit is expected to be effective in addressing the issue of energy dissipation at nano scale regime. This work targets the design of reversible ALU (arithmetic logic unit) in QCA framework and proposes a new “Reversible QCA” (RQCA). The primary design focus is on optimizing the number of reversible gates, quantum cost and the garbage outputs that are the most important hindrances in realizing reversible logic. Besides optimization, the fault coverage capability of RQCA under missing/additional cell deposition defects is analysed. The scope of reversible logic is further outstretched by introducing a novel DFT (design for testability) architecture around the reversible ALU that reduces testing overhead. The performance of proposed ALU is evaluated, subjected to different faults, and is established to be more effective than the existing ALU.
- Islamshah Amlani, Alexei O. Orlov, Geza Toth, Gary H. Bernstein, Craig S. Lent, and Gregory L. Snider. 1999. Digital logic gate using quantum-dot cellular automata. Science 284, 5412, 289--291.Google Scholar
- C. H. Bennett. 1973. Logical reversibility of computation. IBM J. Res. Devel. 525--532. Google ScholarDigital Library
- P. Oscar Boykin and Vwani P. Roychowdhury. 2005. Reversible fault-tolerant logic. In Proceedings of the International Conference on Dependable Systems and Networks (DSN'05). 444--453. DOI: http://dx.doi.org/10.1109/DSN.2005.83 Google ScholarDigital Library
- Amir Fijany and Benny N. Toomarian. 2001. New design for quantum dots cellular automata to obtain fault tolerant logic gates. Int. J. Nanoparticle Res. 3, 1, 27--37.Google ScholarCross Ref
- E. Fredkin and T. Toffoli. 1982. Conservative logic. Int. J. Theoret. Phys. 21, 219--253.Google ScholarCross Ref
- Swaroop Ghosh and Kaushik Roy. 2008. Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching. In Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC'08). 635--640. DOI: http://dx.doi.org/10.1109/ASPDAC.2008.4484029 Google ScholarDigital Library
- Zhijin Guan, Wenjuan Li, Weiping Ding, Yueqin Hang, and Lihui Ni. 2011. An arithmetic logic unit design based on reversible logic gates. In Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PacRim'11). 925--931. DOI: http://dx.doi.org/10.1109/PACRIM.2011.6033020Google ScholarCross Ref
- Pallav Gupta, Abhinav Agrawal, and Niraj K. Jha. 2006. An algorithm for synthesis of reversible logic circuits. IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. 25, 11. Google ScholarDigital Library
- William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang, and Marek Perkowski. 2006. Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. 25, 9, 1652--1663. DOI: http://dx.doi.org/10.1109/TCAD.2005.858352 Google ScholarDigital Library
- ISCAS 2004. IEEE International Symposium on Circuit and Systems. (2004). “QCA: A promising research area for CAS society”.Google Scholar
- Pawel Kerntopf. 2002. Synthesis of multipurpose reversible logic gates. In Proceedings of the Euromicro Symposium DSD. IEEE, 259--267. Google ScholarDigital Library
- Avinash G. Keskar and Vishal R. Satpute. 2011. Design of eight bit novel reversible arithmetic and logic unit. In Proceedings of the 4th International Conference on Emerging Trends in Engineering and Technology (ICETET'11). 227--232. DOI: http://dx.doi.org/10.1109/ICETET.2011.17 Google ScholarDigital Library
- R. Landauer. 1961. Irreversibility and heat generation in the computational process. IBM J. Res. Devel. 5, 183--191. Google ScholarDigital Library
- C. S. Lent, P. D. Tougaw, W. Porod, and G. H. Bernstein. 1993. Quantum cellular automata. Nanotechnology 4, 49--57.Google ScholarCross Ref
- Xiaojun Ma, Jing Huang, and Fabrizio Lombardi. 2008. A model for computing and energy dissipation of molecular QCA devices and circuits. J. Emerg. Technol. Comput. Syst. 3, 4, Article 3, 30. DOI: http://dx.doi.org/10.1145/1324177.1324180 Google ScholarDigital Library
- Mariam Momenzadeh, Jing Huang, Mehdi B. Tahoori, and Fabrizio Lombardi. 2005a. Characterization, test and logic synthesis of And-Or-Inverter (AOI) gate design for QCA implementation. IEEE Trans. Comput.-Aided Des. Integ. Circ. Syst. 24, 12, 1881--1893. Google ScholarDigital Library
- Mariam Momenzadeh, Marco Ottavi, and Fabrizio Lombardi. 2005b. Modeling QCA defects at molecular-level in combinational circuits. In Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05). 208--216. DOI: http://dx.doi.org/10.1109/DFTVS.2005.46 Google ScholarDigital Library
- Matthew Arthur Morrison. 2012. Design of a reversible alu based on novel reversible logic structures. Master's thesis. Department of Computer Science and Engineering, University of South Florida.Google Scholar
- S. F. Murphy, M. Ottavi, M. Frank, and E. DeBenedictis. 2006. On the design of reversible QDCA systems. Techn. Rep. SAND2006-5990.Google Scholar
- Michael Nachtigal, Himanshu Thapliyal, and Nagarajan Ranganathan. 2010. Design of a reversible single precision floating point multiplier based on operand decomposition. In Proceedings of the IEEE Conference on Nanotechnology (IEEE-NANO'10). 233--237. DOI: http://dx.doi.org/10.1109/NANO.2010.5697746Google ScholarCross Ref
- Mark Oskin, Frederic T. Chong, and Isaac L. Chuang. 2002. A practical architecture for reliable quantum computers. Computer 35, 1, 79--87. DOI: http://dx.doi.org/10.1109/2.976922 Google ScholarDigital Library
- Marco Ottavi, Luca Schtano, Fabrizio Lombardi, and Dougals Tougaw. 2006. HDLQ: A HDL environment for QCA design. ACM J. Emerg. Tech. 2, 4, 243261. Google ScholarDigital Library
- Zachary D. Patitz, Nohpill Park, Minsu Choi, and Fred J. Meyer. 2005. QCA-based majority gate design under radious of effect-induced faults. In Proceedings of the 20th International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05). IEEE. Google ScholarDigital Library
- Asher Peres. 1985. Reversible logic and quantum computers. Phys. Rev. A 32, 3266--3276. Issue 6. DOI: http://dx.doi.org/10.1103/PhysRevA.32.3266Google ScholarCross Ref
- Marek Perkowski, Martin Lukac, Pawel Kerntopf, Mikhail Pivtoraiko, Dongsoo Lee, Hyungock Kim, Woong Hwangbo, Jung wook Kim, and Yong Woo Choi. 2002. A hierarchical approach to computer-aided design of quantum circuits. In Proceedings of the 6th International Symposium on Representations and Methodology of Future Computing Technology. 201--209.Google Scholar
- Jie Ren and Vasili K. Semenov. 2011. Progress with physically and logically reversible superconducting digital circuits. IEEE Trans. Appl. Superconduct. 21, 3, 780--786. DOI: http://dx.doi.org/10.1109/TASC.2011.2104352Google ScholarCross Ref
- Bibhash Sen, Mamata Dalui, and Biplab K Sikdar. 2010. Fault tolerant QCA logic design with coupled majority-minority gate. Int. J. Comput. Appl. 1, 29, 81--87. DOI: http://dx.doi.org/10.5120/596-645Google Scholar
- Bibhash Sen, Manojit Dutta, Debajyoty Banik, Dipak K Singh, and Biplab K Sikdar. 2012. Design of fault tolerant reversible arithmetic logic unit in QCA. In Proceedings of the International Symposium on Electronic System Design (ISED'12). 241--245. DOI: http://dx.doi.org/10.1109/ISED.2012.50 Google ScholarDigital Library
- John A. Smolin and David P. Divincenzo. 1995. Five two-bit quantum gates are sufficient to implement the quantum fredkin gate. Phys. Rev. A 53, 2855--2856.Google ScholarCross Ref
- Saket Srivastava, Sudeep Sarkar, and Sanjukta Bhanja. 2009. Estimation of upper bound of power dissipation in QCA circuits. IEEE Trans. Nanotech. 8, 1, 116--127. DOI: http://dx.doi.org/10.1109/TNANO.2008.2005408 Google ScholarDigital Library
- Y. Syamala and A. V. N. Tilak. 2011. Reversible arithmetic logic unit. In Proceedings of the 3rd International Conference on Electronics Computer Technology (ICECT'11), vol. 5, 207--211. DOI: http://dx.doi.org/10.1109/ICECTECH.2011.5941987Google ScholarCross Ref
- Mehdi B. Tahoori, Jing Huang, Mariam Momenzadeh, and Fabrizio Lombardi. 2004. Testing of quantum cellular automata. IEEE Trans. Nanotech. 3, 4, 432--44. Google ScholarDigital Library
- Himanshu Thapliyal and Nagarajan Ranganathan. 2010. Reversible logic-based concurrently testable latches for molecular QCA. IEEE Trans. Nanotech. 9, 1, 62--69. DOI: http://dx.doi.org/10.1109/TNANO.2009.2025038 Google ScholarDigital Library
- Himanshu Thapliyal, Nagarajan Ranganathan, and Saurabh Kotiyal. 2012. Design of testable reversible sequential circuits. IEEE Trans. VLSI. DOI: http://dx.doi.org/10.1109/TVLSI.2012.2209688 Google ScholarDigital Library
- Michael Kirkedal Thomsen, Robert Glck, and Holger Bock Axelsen. 2010. Reversible arithmetic logic unit for quantum arithmetic. J. Phys. A: Math. Theoret. 43, 38, 382002.Google ScholarCross Ref
- John Timler and Craig S. Lent. 2002. Power gain and dissipation in quantum-dot cellular automata. J. Appl. Phys. 91, 2, 823--831.Google ScholarCross Ref
- Tommaso Toffoli. 1980. Reversible computing. Tech. rep. MIT/LCS/TM-151. DOI: http://dx.doi.org/10.1007/3-540-10003-2104Google Scholar
- Yvan Van Rentergem and Alexis De Vos. 2005. Optimal design of a reversible full adder. Int J. Unconvent. Comput. 1, 339--355.Google Scholar
- Konrad Walus, Timothy J. Dysart, Graham A. Jullien, and R. Arief Budiman. 2004. QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata. IEEE Trans. Nanotech. 3, 1, 26--29. Google ScholarDigital Library
- Xiaokuo Yang, Li Cai, Shuzhao Wang, Zhuo Wang, and Chaowen Feng. 2012. Reliability and performance evaluation of QCA devices with rotation cell defect. IEEE Trans. Nanotech. 11, 5, 1009--1018. DOI: http://dx.doi.org/10.1109/TNANO.2012.2211613 Google ScholarDigital Library
Index Terms
- Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU
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