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Making chips smarter

Published:24 April 2017Publication History
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Abstract

Advances in artificial intelligence and machine learning are motivating researchers to design and build new chips to support different computing models.

References

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  4. Shirahata, K., Tomita, Y., and Ike, A. Memory reduction method for deep neural network training, 2016 IEEE 26th International Workshop on Machine Learning for Signal Processing (MLSP), 2016, pp. 1-6. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7738869&isnumber=7738802Google ScholarGoogle ScholarCross RefCross Ref

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  1. Making chips smarter

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                    • Published in

                      cover image Communications of the ACM
                      Communications of the ACM  Volume 60, Issue 5
                      May 2017
                      101 pages
                      ISSN:0001-0782
                      EISSN:1557-7317
                      DOI:10.1145/3084186
                      • Editor:
                      • Moshe Y. Vardi
                      Issue’s Table of Contents

                      Copyright © 2017 ACM

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                      Association for Computing Machinery

                      New York, NY, United States

                      Publication History

                      • Published: 24 April 2017

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