Abstract
Alfa-1 is a simulated computer designed for computer organization courses. Alfa-1 and its accompanying toolkit allow students to acquire practical insights into developing hardware by extending existing components. The DEVS formalism is used to model individual components and to integrate them into a hierarchy that describes the detailed behavior of different levels of a computer's architecture. We introduce Alfa-1 and the toolkit, show how to extend existing components, and describe how to use Alfa-1 for educational purposes. We also explain how to assemble, link, and execute applications and how to test new extensions usingthe testing tools.
- ANDERSON, K., BUTTRON, J., CLARKE, P., AND ENWALD, M. 1999. WOOKIE: A 68HC11 Emulator Dr.Dobbs J. 24, 3, 50-55.Google Scholar
- BABAOGLU, O., BUSSAN, M., DRUMMOND, R., AND SCHNEIDER, F. 1983. Documentation for the CHIP computersystem. Tech. Rep. TR83-584, Computer Sciences Dept., Cornell Univ., Ithaca, NY. Google Scholar
- BEDICHEK, R. 1995. Talisman: Fast and accurate multicomputer simulation. In Proceedings of the SIGMETRICS'95 Conference (Ottawa, Ont., Canada). Google Scholar
- BEIZER, B. 1990. Software Testing Techniques, 2nd ed. Van Nostrand Reinhold, New York, NY. Google Scholar
- BEVILACQUA, R., GOMEZ, L., AND GOMEZ, S. 2000. The PROVIR virtual processor. M. Sc. Thesis, Dep. deComputacion, Facultad de Ciencias Exactas y Naturales, Univ. de Buenos Aires (in Spanish).Google Scholar
- BREWER, E.A., DELLAROCAS, C.N., COLBROOK, A. AND WEIHL, W.E. 1991. PROTEUS: A high-performanceparallel-architecture simulator. Tech. Rep. TR-516, MIT / LCS, Laboratory for Computer Science, MIT,Cambridge, MA. Google ScholarCross Ref
- BURGER, D., AND AUSTIN, T. 1997. The SimpleScalar tool set. Version 2.0. Comput. Architecture News 25, 3,13-25. Google ScholarDigital Library
- BURNS, M., GEORGE, A., AND WALLACE, B. 2000. Modeling and simulative performance analysis of SMPand clustered computer architectures. Simulation 74, 2, 84-96.Google ScholarCross Ref
- CAMPENHOUT, J., VERPLAETSE, P., AND NEEFS, H. 1998. ESCAPE: Environment for the simulation of computerarchitectures for the purpose of education. In Proceedings of the Workshop on Computer ArchitectureEducation (Las Vegas, NV). Google Scholar
- COE, P., WILLIAMS, L., AND IBBETT, R. 1996. An interactive environment for the teaching of computer architecture.In Proceedings of the Annual Joint Conference Integrating Technology into Computer ScienceEducation (Barcelona). Google Scholar
- DAICZ, S., TROCCOLI, A., ZLOTNIK, S., AND WAINER, G. 1998. Architectural definition of the ALFA-1 simulatedprocessor. Internal report. Computer Science Dept., Univ. de Buenos Aires.http://www.sce.carleton.ca/faculty/wainer/alfa-1.html.Google Scholar
- DEITZ, H., AND ADAMS, G. 1994. CASLE (Compiler/Architecture Simulation for Learning and Experimenting).Online report. http://purcell.ecn.purdue.edu/~casle/Index.html.Google Scholar
- DE SIMONI, L., ENRIQUE, S., GLINSKY, E., PETRONIO, F., WASSERMANN, D., AND WAINER, G. 1998. Definitionof components for the ALFA-1 simulated processor. Internal report. Computer Science Dept., Univ.de Buenos Aires (in Spanish). http://www.sce.carleton.ca/faculty/wainer/alfa-1.htmlGoogle Scholar
- EDMONSON, J., AND REILLY, M. 1998. Performance simulation of an ALPHA microprocessor. IEEE Computer31, 5, 50-58. Google Scholar
- EL HAJJ, A., KABALAN, K., MNEIMNEH, M., AND KARABLIEH, F. 2000. Microprocessor simulation and programassembling using spreadsheets. Simulation 75, 2, 82-90.Google ScholarCross Ref
- GHOSH, S. 2000. Hardware Description Languages: Concepts and Principles. IEEE Press. Google Scholar
- HEIN, A., AND DAL CIN, M. 1998. Performance and dependability evaluation of scalable massively parallelcomputer systems with conjoint simulation. ACM Trans Model. Comput. Simul. 8, 4, 333-373. Google ScholarDigital Library
- HENNESSY, J. L. AND PATTERSON, D. A. 1996. Computer Architecture: A Quantitative Approach. 2nd ed.Morgan Kaufmann, San Francisco, CA. Google ScholarDigital Library
- HEURING, V., AND JORDAN, H. 1997. Computer Systems Design and Architecture. Addison-Wesley, Reading,MA. Google Scholar
- HOWDEN, W. E. 1981. A survey of dynamic analysis methods. In Software Testing and Validation Techniques2nd ed., E. Miller and W. E. Howden, eds., IEEE Computer Society Press, New York, NY.Google Scholar
- IKODINOVIC, I., MAGDIC, D., MILENKOVIC, A., AND MILUTINOVIC, V. 1999. Limes: A multiprocessor simulationenvironment for PC platforms. In Proceedings of the Third International Conference on ParallelProcessing and Applied Mathematics (PPAM, Kazimierz Dolny, Poland).Google Scholar
- ISACOVICH, F., MISLEJ, E., WINTERNITZ, F., AND WAINER, G. 1999. An emulator of the Atari processorInternal Report, Computer Sciences Dept., Univ. de Buenos Aires (in Spanish).Google Scholar
- MITSCHELE-THIEL, A. 2000. Systems Engineering with SDL. Wiley, New York, NY.Google Scholar
- MORSIANI, M., AND DAVOLI, R. 1999. The MPS computer system simulator. Tech. Rep. UBLCS-99-8, Univ.de Bologna. Google Scholar
- NGUYEN, A.T., MICHAEL, M., SHARMA, A., AND TORRELLAS, J. 1996. The Augmint multiprocessor simulationtoolkit for Intel x86 architecture computer design. In Proceedings of the IEEE International Conferenceon VLSI in Computers and Processors (San Antonio, TX), 486-490. Google Scholar
- PASTOR, E. AND SANCHEZ, F. 1997 The rudimentary computer: A pedagogic processor. In Proceedings of IIIJornadas de Ensenyanza Universitaria sobre Informatica (JENUI'97, Madrid). (In Spanish).Google Scholar
- PATTERSON, D. 1995. Computer Organization and Design: The Hardware/Software Interface, 2nd ed. Universityof California, Berkeley. Google Scholar
- PEARCE, T. 2000. Notes on p86 Assembly language and assembling. 2000. Internal report, Dept. of Systemsand Computer Engineering. Carleton Univ. http://www.sce.carleton.ca/courses/94201/.Google Scholar
- RODRIGUEZ, D. AND WAINER, G. 1999. New extensions to the CD++ tool. In Proceedings of the SCS SummerComputer Simulation Conference (Chicago, IL), 1-6.Google Scholar
- ROSENBLUM, M., BUGNION, E., DEVINE, S., AND HERROD, S. 1997. Using the SimOS machine simulator tostudy complex computer systems. ACM Trans. Model. Comput. Simul. 7, 1, 78-103. Google ScholarDigital Library
- SHANMUGAN, K., FROST, V., LA RUE, W. 1992. A block-oriented network simulator (BONeS). Simulation 58,2.Google Scholar
- SHEALY, A., MALLOY, B., AND SYKES, D. 1997. An extensible simulator for the Intel 80x86 processor family.In Proceedings of the 30th Annual Simulation Symposium (Atlanta, GA. April), 157-166. Google Scholar
- SKRIEN, D. 1994. CPU Sim: A computer simulator for use in an introductory computer organization class. J.Comput. Higher Education 6, 1, 3-13.Google ScholarCross Ref
- STALLINGS, W. 1999. Computer Organization and Architectre, 4th ed. Macmillan, New York, NY. Google Scholar
- SUN MICROSYSTEMS. 2001. SPARC Assembly Language Reference Manual. http://docs.sun.com/.Google Scholar
- TANENBAUM, A. S. 1999. Structured Computer Organization, 4th ed. Prentice Hall, Englewood Cliffs, NJ. Google Scholar
- THOMAS, D., AND MOORBY, P. 1991. The Verilog Hardware Description Language. Kluwer Academic,Boston, MA. Google Scholar
- WAINER, G. 2001. Experiences with DEVS modelling and simulation. IASTED J. Model. Simul. (March).Google Scholar
Index Terms
- Using the Alfa-1 simulated processor for educational purposes
Recommendations
Benefits and challenges in developing warship simulator based on DEVS formalism
SpringSim '10: Proceedings of the 2010 Spring Simulation MulticonferenceModeling and simulation(M&S) engineering is one of the most challenging areas that have to deal with problems from multiple domains. Hence, in the M&S field, the various domain experts and the M&S experts often work together to build a simulator. Yet, ...
Efficient Distributed Simulation of Hierarchical DEVS Models: Transforming Model Structure into a Non-Hierarchical One
SS '00: Proceedings of the 33rd Annual Simulation SymposiumThe Discrete Event Systems Specification (DEVS) formalism specifies a discrete event system in a hierarchical, modular form. This paper presents a distributed simulation methodology for models specified by the DEVS formalism. The methodology transforms ...
DEVSpecL: DEVS specification language for modeling, simulation and analysis of discrete event systems
Discrete EVent Systems Specification (DEVS) formalism supports specification of discrete event models in a hierarchical modular manner. This paper proposes a DEVS modeling language called DEVS Specification Language (DEVSpecL) based on which discrete ...
Comments