skip to main content
Skip header Section
Computer architecture (2nd ed.): a quantitative approachJanuary 1996
Publisher:
  • Morgan Kaufmann Publishers Inc.
  • 340 Pine Street, Sixth Floor
  • San Francisco
  • CA
  • United States
ISBN:978-1-55860-329-5
Published:01 January 1996
Pages:
1014
Skip Bibliometrics Section
Bibliometrics
Abstract

No abstract available.

Cited By

  1. Kundu S, Ganganaik P, Louis J, Chalamalasetty H and Rao B (2022). Memristors Enabled Computing Correlation Parameter In-Memory System: A Potential Alternative to Von Neumann Architecture, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 30:6, (755-768), Online publication date: 1-Jun-2022.
  2. Rho S, Park G, Choi J and Park C (2021). Development of benchmark automation suite and evaluation of various high-performance computing systems, Cluster Computing, 24:1, (159-179), Online publication date: 1-Mar-2021.
  3. Jeon Y, Park B, Kwon S, Kim B, Yun J and Lee D BiQGEMM Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, (1-16)
  4. ACM
    Vineyard C, Plagge M and Green S Comparing Neural Accelerators & Neuromorphic Architectures The False Idol of Operations Proceedings of the Neuro-inspired Computational Elements Workshop, (1-6)
  5. Coffin E, Young S, Kent K and Pirvu M A roadmap for extending MicroJIT Proceedings of the 29th Annual International Conference on Computer Science and Software Engineering, (293-298)
  6. Nair A, Colaco L, Patil G, Raveendran B and Punnekkatt S MEDIATOR Proceedings of the 23rd IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, (146-153)
  7. ACM
    Chen Y and Louri A An online quality management framework for approximate communication in network-on-chips Proceedings of the ACM International Conference on Supercomputing, (217-226)
  8. Wang X, Qi Y, Wang Z, Chen Y and Zhou Y (2019). Design and Implementation of SecPod, A Framework for Virtualization-Based Security Systems, IEEE Transactions on Dependable and Secure Computing, 16:1, (44-57), Online publication date: 1-Jan-2019.
  9. Dey M, Nazari A, Zajic A and Prvulovic M TEMProf Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, (881-893)
  10. Yan M, Choi J, Skarlatos D, Morrison A, Fletcher C and Torrellas J InvisiSpec Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, (428-441)
  11. ACM
    Kulkarni C, Kesavan A, Zhang T, Ricci R and Stutsman R Rocksteady Proceedings of the 26th Symposium on Operating Systems Principles, (390-405)
  12. ACM
    Fu X, Rol M, Bultink C, van Someren J, Khammassi N, Ashraf I, Vermeulen R, de Sterke J, Vlothuizen W, Schouten R, Almudever C, DiCarlo L and Bertels K An experimental microarchitecture for a superconducting quantum processor Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, (813-825)
  13. Yin H, Jia H, Zhou J and Gao Z (2017). Survey on Algorithm and VLSI Architecture for MPEG-Like Video Coder, Journal of Signal Processing Systems, 88:3, (357-410), Online publication date: 1-Sep-2017.
  14. ACM
    Zhang Y, Anwer B, Gopalakrishnan V, Han B, Reich J, Shaikh A and Zhang Z ParaBox Proceedings of the Symposium on SDN Research, (143-149)
  15. Sewall J, Pennycook S, Duran A, Tian X and Narayanaswamy R A modern memory management system for OpenMP Proceedings of the Third International Workshop on Accelerator Programming Using Directives, (25-35)
  16. ACM
    Joshi A, Vollala S, Begum B and Ramasubramanian N Performance Analysis of Cache Coherence Protocols for Multi-core Architectures Proceedings of the International Conference on Advances in Information Communication Technology & Computing, (1-7)
  17. ACM
    Shahvarani A and Jacobsen H A Hybrid B+-tree as Solution for In-Memory Indexing on CPU-GPU Heterogeneous Computing Platforms Proceedings of the 2016 International Conference on Management of Data, (1523-1538)
  18. Sun Q, Yang C, Wu C, Li L and Liu F Fast parallel stream compaction for IA-based multi/many-core processors Proceedings of the 16th IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing, (736-745)
  19. Elkhouly R, El-Mahdy A and Elmasry A Optimality analysis of if-conversion transformation Proceedings of the 24th High Performance Computing Symposium, (1-8)
  20. ACM
    Lee Y, Kim J, Jang H, Yang H, Kim J, Jeong J and Lee J (2015). A fully associative, tagless DRAM cache, ACM SIGARCH Computer Architecture News, 43:3S, (211-222), Online publication date: 4-Jan-2016.
  21. LaPre J, Gonsiorowski E, Carothers C, Jenkins J, Carns P and Ross R Time warp state restoration via delta encoding Proceedings of the 2015 Winter Simulation Conference, (3025-3036)
  22. ACM
    Fang Y, Hoang T, Becchi M and Chien A Fast support for unstructured data processing Proceedings of the 48th International Symposium on Microarchitecture, (533-545)
  23. ACM
    Eslami H, Kougkas A, Kotsifakou M, Kasampalis T, Feng K, Lu Y, Gropp W, Sun X, Chen Y and Thakur R Efficient disk-to-disk sorting Proceedings of the 2015 International Workshop on Data-Intensive Scalable Computing Systems, (1-8)
  24. ACM
    Liu Y and Sun X C2-bound Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, (1-11)
  25. ACM
    Altamimi M and Naik K A Computing Profiling Procedure for Mobile Developers to Estimate Energy Cost Proceedings of the 18th ACM International Conference on Modeling, Analysis and Simulation of Wireless and Mobile Systems, (301-305)
  26. Rajendran J, Ali A, Sinanoglu O and Karri R (2015). Belling the CAD: Toward Security-Centric Electronic System Design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34:11, (1756-1769), Online publication date: 1-Nov-2015.
  27. ACM
    Cheng Y and Rusu F (2015). SCANRAW, ACM Transactions on Database Systems, 40:3, (1-45), Online publication date: 23-Oct-2015.
  28. ACM
    Li A, Tay Y, Kumar A and Corporaal H Transit Proceedings of the 24th International Symposium on High-Performance Parallel and Distributed Computing, (101-106)
  29. ACM
    Lee Y, Kim J, Jang H, Yang H, Kim J, Jeong J and Lee J A fully associative, tagless DRAM cache Proceedings of the 42nd Annual International Symposium on Computer Architecture, (211-222)
  30. ACM
    Tan Z, Qian Z, Chen X, Asanovic K and Patterson D (2015). DIABLO, ACM SIGARCH Computer Architecture News, 43:1, (207-221), Online publication date: 29-May-2015.
  31. ACM
    Cilku B and Puschner P (2015). Designing a time predictable memory hierarchy for single-path code, ACM SIGBED Review, 12:2, (16-21), Online publication date: 20-May-2015.
  32. ACM
    Tan Z, Qian Z, Chen X, Asanovic K and Patterson D (2015). DIABLO, ACM SIGPLAN Notices, 50:4, (207-221), Online publication date: 12-May-2015.
  33. Gallenmüller S, Emmerich P, Wohlfart F, Raumer D and Carle G Comparison of Frameworks for High-Performance Packet IO Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, (29-38)
  34. Li W, Jin G, Cui X and See S An evaluation of unified memory technology on NVIDIA GPUs Proceedings of the 15th IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing, (1092-1098)
  35. ACM
    Gunther N, Puglia P and Tomasette K (2015). Hadoop Superlinear Scalability, Queue, 13:5, (20-42), Online publication date: 1-May-2015.
  36. ACM
    Cilku B, Kammerer R and Puschner P (2015). Aligning single path loops to reduce the number of capacity cache misses, ACM SIGBED Review, 12:1, (13-18), Online publication date: 27-Mar-2015.
  37. ACM
    Gunther N, Puglia P and Tomasette K (2015). Hadoop superlinear scalability, Communications of the ACM, 58:4, (46-55), Online publication date: 23-Mar-2015.
  38. ACM
    Tan Z, Qian Z, Chen X, Asanovic K and Patterson D DIABLO Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, (207-221)
  39. ACM
    Chaker H, Cudennec L, Dahmani S, Gogniat G and Sepúlveda M Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Tool-chain Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, (1-10)
  40. ACM
    Morad A, Yavits L and Ginosar R (2015). GP-SIMD Processing-in-Memory, ACM Transactions on Architecture and Code Optimization, 11:4, (1-26), Online publication date: 9-Jan-2015.
  41. Shoukourian H, Wilde T, Auweter A and Bode A (2014). Predicting the Energy and Power Consumption of Strong and Weak Scaling HPC Applications, Supercomputing Frontiers and Innovations: an International Journal, 1:2, (20-41), Online publication date: 9-Jul-2014.
  42. ACM
    Lazarescu M, Cohen A, Guatto A, Lê N, Lavagno L, Pop A, Prieto M, Terechko A and Sutii A Energy-aware parallelization flow and toolset for C code Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, (79-88)
  43. ACM
    Oldfield R, Moreland K, Fabian N and Rogers D Evaluation of methods to integrate analysis into a large-scale shock shock physics code Proceedings of the 28th ACM international conference on Supercomputing, (83-92)
  44. Clarke H, Trouvé A and Murakami K Accelerated design space pruning for CMP memory architectures Proceedings of the High Performance Computing Symposium, (1-6)
  45. Jia G, Li X, Yuan Y, Wan J, Jiang C and Dai D PseudoNUMA for reducing memory interference in multi-core systems Proceedings of the High Performance Computing Symposium, (1-8)
  46. Liu J, Bouganis C and Cheung P Image progressive acquisition for hardware systems Proceedings of the conference on Design, Automation & Test in Europe, (1-6)
  47. Adrien B, Mikaël B, Jean-Luc B and Yvon T Improving processor hardware compiled cycle accurate simulation using program abstraction Proceedings of the 7th International ICST Conference on Simulation Tools and Techniques, (186-194)
  48. Turner-Baggs J and Heywood M On GPU based fitness evaluation with decoupled training partition cardinality Proceedings of the 16th European conference on Applications of Evolutionary Computation, (489-498)
  49. ACM
    Black M and Waggoner N Emumaker86 Proceeding of the 44th ACM technical symposium on Computer science education, (323-328)
  50. ACM
    Majzoobi M, Kong J and Koushanfar F (2013). Low-power resource binding by postsilicon customization, ACM Transactions on Design Automation of Electronic Systems, 18:2, (1-22), Online publication date: 1-Mar-2013.
  51. ACM
    Reineke J and Grund D (2013). Sensitivity of cache replacement policies, ACM Transactions on Embedded Computing Systems, 12:1s, (1-18), Online publication date: 1-Mar-2013.
  52. ACM
    Frigo M, Leiserson C, Prokop H and Ramachandran S (2012). Cache-Oblivious Algorithms, ACM Transactions on Algorithms, 8:1, (1-22), Online publication date: 1-Jan-2012.
  53. ACM
    Sarkar P, Sedaghat R and Sengupta A Application specific processor vs. microblaze soft core RISC processor Proceedings of the International Conference on Advances in Computing and Artificial Intelligence, (82-85)
  54. ACM
    Perarnau S, Tchiboukdjian M and Huard G Controlling cache utilization of HPC applications Proceedings of the international conference on Supercomputing, (295-304)
  55. Azarmehr M and Muscedere R (2011). A RISC architecture for 2DLNS-based signal processing, International Journal of High Performance Systems Architecture, 3:2/3, (149-156), Online publication date: 1-May-2011.
  56. ACM
    Bertasi P, Bressan M and Peserico E (2011). psort, yet another fast stable sorting software, ACM Journal of Experimental Algorithmics, 16, (2.1-2.19), Online publication date: 1-May-2011.
  57. ACM
    Ward S, Papa D, Li Z, Sze C, Alpert C and Swartzlander E Quantifying academic placer performance on custom designs Proceedings of the 2011 international symposium on Physical design, (91-98)
  58. Chou H, Chang K and Kuo S Facilitating unreachable code diagnosis and debugging Proceedings of the 16th Asia and South Pacific Design Automation Conference, (485-490)
  59. Shioya R, Horio K, Goshima M and Sakai S Register Cache System Not for Latency Reduction Purpose Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, (301-312)
  60. Hölldobler S, Manthey N and Saptawijaya A Improving resource-unaware SAT solvers Proceedings of the 17th international conference on Logic for programming, artificial intelligence, and reasoning, (519-534)
  61. Wang M, Su C, Horng C, Wu C and Huang C (2010). Single- and multi-core configurable AES architectures for flexible security, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18:4, (541-552), Online publication date: 1-Apr-2010.
  62. Gellert A, Palermo G, Zaccaria V, Florea A, Vintan L and Silvano C Energy-performance design space exploration in SMT architectures exploiting selective load value predictions Proceedings of the Conference on Design, Automation and Test in Europe, (271-274)
  63. ACM
    Vidhate D, Patil A and Guleria D Dynamic cluster resource allocations for jobs with known memory demands Proceedings of the International Conference and Workshop on Emerging Trends in Technology, (64-69)
  64. ACM
    Geelen B, Ferentinos V, Catthoor F, Lafruit G, Verkest D, Lauwereins R and Stouraitis T (2010). Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements, ACM Transactions on Embedded Computing Systems, 9:3, (1-26), Online publication date: 1-Feb-2010.
  65. Hoffmann H, Wentzlaff D and Agarwal A Remote store programming Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers, (3-17)
  66. Blelloch G and Maggs B Parallel algorithms Algorithms and theory of computation handbook, (25-25)
  67. Savage J and Zubair M (2009). Evaluating multicore algorithms on the unified memory model, Scientific Programming, 17:4, (295-308), Online publication date: 1-Dec-2009.
  68. ACM
    Zhao H, Wang H, Lin B and Xu J Design and performance analysis of a DRAM-based statistics counter array architecture Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems, (84-93)
  69. ACM
    Staschulat J and Bekooij M Dataflow models for shared memory access latency analysis Proceedings of the seventh ACM international conference on Embedded software, (275-284)
  70. ACM
    Sirowy S, Miller B and Vahid F Portable SystemC-on-a-chip Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis, (21-30)
  71. ACM
    Xu W and Tessier R (2009). Tetris-XL, ACM Transactions on Architecture and Code Optimization, 6:3, (1-40), Online publication date: 1-Sep-2009.
  72. Beucher N, Bélanger N, Savaria Y and Bois G (2009). High Acceleration for Video Processing Applications Using Specialized Instruction Set Based on Parallelism and Data Reuse, Journal of Signal Processing Systems, 56:2-3, (155-165), Online publication date: 1-Sep-2009.
  73. Geelen B, Ferentinos V, Catthoor F, Toulatos S, Lafruit G, Stouraitis T, Lauwereins R and Verkest D (2009). Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments, Journal of Signal Processing Systems, 56:2-3, (125-139), Online publication date: 1-Sep-2009.
  74. ACM
    Chou H, Chang K and Kuo S Handling don't-care conditions in high-level synthesis and application for reducing initialized registers Proceedings of the 46th Annual Design Automation Conference, (412-415)
  75. Larabi Z, Mathieu Y and Mancini S Efficient Data Access Management for FPGA-Based Image Processing SoCs Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping, (159-165)
  76. Corliss M and Hendry R (2009). Larc, Journal of Computing Sciences in Colleges, 24:6, (15-20), Online publication date: 1-Jun-2009.
  77. ACM
    Chou H, Lin I, Yang C, Chang K and Kuo S Enhancing bug hunting using high-level symbolic simulation Proceedings of the 19th ACM Great Lakes symposium on VLSI, (417-420)
  78. Kandemir M, Zhang Y and Ozturk O Adaptive prefetching for shared cache based chip multiprocessors Proceedings of the Conference on Design, Automation and Test in Europe, (773-778)
  79. ACM
    Nguyen N, Dominguez A and Barua R (2009). Memory allocation for embedded systems with a compile-time-unknown scratch-pad size, ACM Transactions on Embedded Computing Systems, 8:3, (1-32), Online publication date: 1-Apr-2009.
  80. Alkassar E, Hillebrand M, Leinenbach D, Schirmer N, Starostin A and Tsyban A (2009). Balancing the Load, Journal of Automated Reasoning, 42:2-4, (389-454), Online publication date: 1-Apr-2009.
  81. ACM
    N. K, Banerjee U and Kumar S Performance optimization of SOA based AJAX application Proceedings of the 2nd India software engineering conference, (89-94)
  82. Shen H and Pétrot F Novel task migration framework on configurable heterogeneous MPSoC platforms Proceedings of the 2009 Asia and South Pacific Design Automation Conference, (733-738)
  83. Cheung E, Hsieh H and Balarin F Partial order method for timed simulation of system-level MPSoC designs Proceedings of the 2009 Asia and South Pacific Design Automation Conference, (149-154)
  84. Malki S and Spaanenburg L (2009). A CNN-specific integrated processor, EURASIP Journal on Advances in Signal Processing, 2009, (1-14), Online publication date: 1-Jan-2009.
  85. Mendon A, Schmidt A and Sass R (2009). A hardware filesystem implementation with multidisk support, International Journal of Reconfigurable Computing, 2009, (1-13), Online publication date: 1-Jan-2009.
  86. ACM
    Ras J and Cheng A (2008). Real-time synchronization on distributed architecture with Ada-2005, ACM SIGAda Ada Letters, 28:3, (75-84), Online publication date: 1-Dec-2008.
  87. ACM
    Savage J and Zubair M A unified model for multicore architectures Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, (1-12)
  88. ACM
    Ras J and Cheng A Real-time synchronization on distributed architecture with Ada-2005 Proceedings of the 2008 ACM annual international conference on SIGAda annual international conference, (75-84)
  89. ACM
    Alkabani Y and Koushanfar F Active control and digital rights management of integrated circuit IP cores Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, (227-234)
  90. ACM
    Jovanovic V and Mirzoev T Teachning network storage technology Proceedings of the 9th ACM SIGITE conference on Information technology education, (147-152)
  91. ACM
    Smith R, Estan C, Jha S and Kong S (2008). Deflating the big bang, ACM SIGCOMM Computer Communication Review, 38:4, (207-218), Online publication date: 1-Oct-2008.
  92. Sibai F (2008). On the performance benefits of sharing and privatizing second and third-level cache memories in homogeneous multi-core architectures, Microprocessors & Microsystems, 32:7, (405-412), Online publication date: 1-Oct-2008.
  93. ACM
    Lin B and Xu J (2008). DRAM is plenty fast for wirespeed statistics counting, ACM SIGMETRICS Performance Evaluation Review, 36:2, (45-51), Online publication date: 31-Aug-2008.
  94. ACM
    Smith R, Estan C, Jha S and Kong S Deflating the big bang Proceedings of the ACM SIGCOMM 2008 conference on Data communication, (207-218)
  95. Hu W and Wang J (2008). Making effective decisions in computer architects' real-world, Journal of Computer Science and Technology, 23:4, (620-632), Online publication date: 1-Jul-2008.
  96. ACM
    Alkabani Y and Koushanfar F N-variant IC design Proceedings of the 45th annual Design Automation Conference, (546-551)
  97. ACM
    Gorjiara B and Gajski D Automatic architecture refinement techniques for customizing processing elements Proceedings of the 45th annual Design Automation Conference, (379-384)
  98. ACM
    Liu L, Li Z and Sameh A Analyzing memory access intensity in parallel programs on multicore Proceedings of the 22nd annual international conference on Supercomputing, (359-367)
  99. ACM
    Srikantaiah S, Kandemir M and Irwin M (2008). Adaptive set pinning, ACM SIGPLAN Notices, 43:3, (135-144), Online publication date: 25-Mar-2008.
  100. ACM
    Srikantaiah S, Kandemir M and Irwin M (2008). Adaptive set pinning, ACM SIGOPS Operating Systems Review, 42:2, (135-144), Online publication date: 25-Mar-2008.
  101. ACM
    Srikantaiah S, Kandemir M and Irwin M (2008). Adaptive set pinning, ACM SIGARCH Computer Architecture News, 36:1, (135-144), Online publication date: 25-Mar-2008.
  102. ACM
    Srikantaiah S, Kandemir M and Irwin M Adaptive set pinning Proceedings of the 13th international conference on Architectural support for programming languages and operating systems, (135-144)
  103. ACM
    Vera X, Lisper B and Xue J (2007). Data cache locking for tight timing calculations, ACM Transactions on Embedded Computing Systems, 7:1, (1-38), Online publication date: 1-Dec-2007.
  104. Zhan Y, Zhang T and Sapatnekar S Module assignment for pin-limited designs under the stacked-Vdd paradigm Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, (656-659)
  105. Chen C and Hsiao K (2007). Scalable Dynamic Instruction Scheduler through Wake-Up Spatial Locality, IEEE Transactions on Computers, 56:11, (1534-1548), Online publication date: 1-Nov-2007.
  106. Hillebrand M and Paul W On the architecture of system verification environments Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing, (153-168)
  107. Hillebrand M and Paul W On the Architecture of System Verification Environments Hardware and Software: Verification and Testing, (153-168)
  108. ACM
    Yang C and Orailoglu A Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, (150-154)
  109. ACM
    Nguyen N, Dominguez A and Barua R Scratch-pad memory allocation without compiler support for java applications Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, (85-94)
  110. ACM
    Deris K and Baniasadi A (2007). Investigating cache energy and latency break-even points in high performance processors, ACM SIGARCH Computer Architecture News, 35:4, (13-20), Online publication date: 1-Sep-2007.
  111. ACM
    Hsieh J, Kuo T, Wu P and Huang Y Energy-efficient and performance-enhanced disks using flash-memory cache Proceedings of the 2007 international symposium on Low power electronics and design, (334-339)
  112. Alkabani Y and Koushanfar F Active hardware metering for intellectual property protection and security Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium, (1-16)
  113. Tan G, Xu L, Dai Z, Feng S and Sun N (2007). A Study of Architectural Optimization Methods in Bioinformatics Applications, International Journal of High Performance Computing Applications, 21:3, (371-384), Online publication date: 1-Aug-2007.
  114. Park S and Shin H Performance evaluation of memory management configurations in Linux for an OS-level design space exploration Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation, (24-33)
  115. ACM
    Wang P, Collins J, Chinya G, Lint B, Mallick A, Yamada K and Wang H Sequencer virtualization Proceedings of the 21st annual international conference on Supercomputing, (148-157)
  116. ACM
    Ramachandran U and Leahy W An integrated approach to teaching computer systems architecture Proceedings of the 2007 workshop on Computer architecture education, (38-43)
  117. ACM
    Pascual L, Torrentí A, Sahuquillo J and Flich J Understanding cache hierarchy interactions with a program-driven simulator Proceedings of the 2007 workshop on Computer architecture education, (30-35)
  118. ACM
    Bečvář M and Kahánek S VLIW-DLX simulator for educational purposes Proceedings of the 2007 workshop on Computer architecture education, (8-13)
  119. ACM
    Yeh T, Faloutsos P, Patel S and Reinman G (2007). ParallAX, ACM SIGARCH Computer Architecture News, 35:2, (232-243), Online publication date: 9-Jun-2007.
  120. ACM
    Yeh T, Faloutsos P, Patel S and Reinman G ParallAX Proceedings of the 34th annual international symposium on Computer architecture, (232-243)
  121. ACM
    Kennedy K, Koelbel C and Zima H The rise and fall of High Performance Fortran Proceedings of the third ACM SIGPLAN conference on History of programming languages, (7-1-7-22)
  122. He B, Luo Q and Choi B (2007). Adaptive Index Utilization in Memory-Resident Structural Joins, IEEE Transactions on Knowledge and Data Engineering, 19:6, (772-788), Online publication date: 1-Jun-2007.
  123. Zhao L, Bhuyan L, Iyer R, Makineni S and Newell D (2007). Hardware Support for Accelerating Data Movement in Server Platform, IEEE Transactions on Computers, 56:6, (740-753), Online publication date: 1-Jun-2007.
  124. van Haastregt S and Knijnenburg P Interactive presentation: Feasibility of combined area and performance optimization for superscalar processors using random search Proceedings of the conference on Design, automation and test in Europe, (606-611)
  125. Qian X, Huang H, Duan Z, Zhang J, Yuan N, Zhou Y, Zhang H, Cui H and Fan D Optimized register renaming scheme for stack-based x86 operations Proceedings of the 20th international conference on Architecture of computing systems, (43-56)
  126. ACM
    Kimm H, Shin S and Sung C Evaluation of interval-based dynamic voltage scaling algorithms on mobile Linux system Proceedings of the 2007 ACM symposium on Applied computing, (1141-1145)
  127. ACM
    Pandurangan G and Upfal E (2007). Entropy-based bounds for online algorithms, ACM Transactions on Algorithms, 3:1, (1-19), Online publication date: 1-Feb-2007.
  128. Hoza F and Radulescu V A NUMA architecture for parallel structures Proceedings of the 26th IASTED International Conference on Modelling, Identification, and Control, (302-307)
  129. Knapp S and Paul W Realistic worst-case execution time analysis in the context of pervasive system verification Program analysis and compilation, theory and practice, (53-81)
  130. ACM
    Drinić M, Kirovski D and Vo H (2007). PPMexe, ACM Transactions on Programming Languages and Systems, 29:1, (3-es), Online publication date: 1-Jan-2007.
  131. Lee J and Mooney V (2006). A Novel {O(n)} Parallel Banker's Algorithm for System-on-a-Chip, IEEE Transactions on Parallel and Distributed Systems, 17:12, (1377-1389), Online publication date: 1-Dec-2006.
  132. Takesue M (2006). The psi-cube, Parallel Computing, 32:11-12, (852-869), Online publication date: 1-Dec-2006.
  133. ACM
    He B and Luo Q Cache-oblivious nested-loop joins Proceedings of the 15th ACM international conference on Information and knowledge management, (718-727)
  134. Singh V, Inoue M, Saluja K and Fujiwara H (2006). Instruction-based self-testing of delay faults in pipelined processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14:11, (1203-1215), Online publication date: 1-Nov-2006.
  135. Hsiao K and Chen C (2006). Wake-up logic optimizations through selective match and wakeup range limitation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14:10, (1089-1102), Online publication date: 1-Oct-2006.
  136. Kang J and Gaudiot J (2006). A Simple High-Speed Multiplier Design, IEEE Transactions on Computers, 55:10, (1253-1258), Online publication date: 1-Oct-2006.
  137. ACM
    Deris K and Baniasadi A Investigating cache energy and latency break-even points in high performance processors Proceedings of the 2006 workshop on MEmory performance: DEaling with Applications, systems and architectures, (13-20)
  138. Harizopoulos S, Liang V, Abadi D and Madden S Performance tradeoffs in read-optimized databases Proceedings of the 32nd international conference on Very large data bases, (487-498)
  139. ACM
    Harizopoulos S and Ailamaki A (2006). Improving instruction cache performance in OLTP, ACM Transactions on Database Systems, 31:3, (887-920), Online publication date: 1-Sep-2006.
  140. Guo J, Limberg T, Matus E, Mennenga B, Klemm R and Fettweis G Code generation for STA architecture Proceedings of the 12th international conference on Parallel Processing, (299-310)
  141. Beyer S, Jacobi C, Kröning D, Leinenbach D and Paul W (2006). Putting it all together --- Formal verification of the VAMP, International Journal on Software Tools for Technology Transfer (STTT), 8:4-5, (411-430), Online publication date: 1-Aug-2006.
  142. Zheng K, Hu C, Lu H and Liu B (2006). A TCAM-based distributed parallel IP lookup scheme and performance analysis, IEEE/ACM Transactions on Networking, 14:4, (863-875), Online publication date: 1-Aug-2006.
  143. Gok M, Schulte M and Arnold M (2006). Integer Multipliers with Overflow Detection, IEEE Transactions on Computers, 55:8, (1062-1066), Online publication date: 1-Aug-2006.
  144. Lee S, Choi W and Park D FAST Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing, (879-887)
  145. Keramidas G, Petoumenos P, Kaxiras S, Antonopoulos A and Serpanos D Preventing denial-of-service attacks in shared CMP caches Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation, (359-372)
  146. ACM
    Kreahling W, Hines S, Whalley D and Tyson G (2006). Reducing the cost of conditional transfers of control by using comparison specifications, ACM SIGPLAN Notices, 41:7, (64-71), Online publication date: 12-Jul-2006.
  147. Alastruey J, Briz J, Ibanez P and Cinals V (2006). Software Demand, Hardware Supply, IEEE Micro, 26:4, (72-82), Online publication date: 1-Jul-2006.
  148. Alsaadi A Applying the UML class diagram in the performance analysis Proceedings of the Third European conference on Formal Methods and Stochastic Models for Performance Evaluation, (148-165)
  149. ACM
    Kreahling W, Hines S, Whalley D and Tyson G Reducing the cost of conditional transfers of control by using comparison specifications Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems, (64-71)
  150. Wolf T and Franklin M (2006). Performance Models for Network Processor Design, IEEE Transactions on Parallel and Distributed Systems, 17:6, (548-561), Online publication date: 1-Jun-2006.
  151. Narayanasamy S, Pereira C and Calder B Software Profiling for Deterministic Replay Debugging of User Code Proceedings of the 2006 conference on New Trends in Software Methodologies, Tools and Techniques: Proceedings of the fifth SoMeT_06, (211-230)
  152. ACM
    Ji M, Wang J, Li S and Qi Z Automated WCET analysis based on program modes Proceedings of the 2006 international workshop on Automation of software test, (36-42)
  153. O'Leary D (2006). Computer Memory and Arithmetic, Computing in Science and Engineering, 8:3, (54-59), Online publication date: 1-May-2006.
  154. Shao Z, Xue C, Zhuge Q, Qiu M, Xiao B and Sha E (2006). Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software, IEEE Transactions on Computers, 55:4, (443-453), Online publication date: 1-Apr-2006.
  155. Karuri K, Leupers R, Ascheid G, Meyr H and Kedia M Design and implementation of a modular and portable IEEE 754 compliant floating-point unit Proceedings of the conference on Design, automation and test in Europe: Designers' forum, (221-226)
  156. ACM
    Patterson D (2006). Computer science education in the 21st century, Communications of the ACM, 49:3, (27-30), Online publication date: 1-Mar-2006.
  157. Caminero B, Carrión C, Quiles F, Duato J and Yalamanchili S (2006). MMR, Journal of Parallel and Distributed Computing, 66:2, (307-321), Online publication date: 1-Feb-2006.
  158. Cai Y, Schmitz M, Ejlali A, Al-Hashimi B and Reddy S Cache size selection for performance, energy and reliability of time-constrained systems Proceedings of the 2006 Asia and South Pacific Design Automation Conference, (923-928)
  159. Rodríguez F and Serrano J Control flow error checking with ISIS Proceedings of the Second international conference on Embedded Software and Systems, (659-670)
  160. Kuntraruk J, Pottenger W and Ross A (2005). Application Resource Requirement Estimation in a Parallel-Pipeline Model of Execution, IEEE Transactions on Parallel and Distributed Systems, 16:12, (1154-1165), Online publication date: 1-Dec-2005.
  161. Zhang W (2005). Replication Cache, IEEE Transactions on Computers, 54:12, (1547-1555), Online publication date: 1-Dec-2005.
  162. Kri F, Gómez C and Caro P Overview of metaheuristics methods in compilation Proceedings of the 4th Mexican international conference on Advances in Artificial Intelligence, (483-493)
  163. Huo Y, Ju J and Hu L RRBS Proceedings of the Third international conference on Parallel and Distributed Processing and Applications, (180-187)
  164. Liu C, Ganusov I, Burtscher M and Tiwari S (2005). Bridging the Processor-Memory Performance Gapwith 3D IC Technology, IEEE Design & Test, 22:6, (556-564), Online publication date: 1-Nov-2005.
  165. Rui H, Zhang F and Hu W A memory bandwidth effective cache store miss policy Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture, (750-760)
  166. Della Penna G, Melatti I, Intrigila B and Tronci E Exploiting hub states in automatic verification Proceedings of the Third international conference on Automated Technology for Verification and Analysis, (54-68)
  167. Zhao L, Iyer R, Makineni S, Bhuyan L and Newell D Hardware Support for Bulk Data Movement in Server Platforms Proceedings of the 2005 International Conference on Computer Design, (53-60)
  168. Hillebrand M, Rieden T and Paul W Dealing with I/O Devices in the Context of Pervasive System Verification Proceedings of the 2005 International Conference on Computer Design, (309-316)
  169. Beyer S, Bohm P, Gerke M, Hillebrand M, Rieden T, Knapp S, Leinenbach D and Paul W Towards the Formal Verification of Lower System Layers in Automotive Systems Proceedings of the 2005 International Conference on Computer Design, (317-326)
  170. Chen Y (2005). Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring, IEEE Transactions on Computers, 54:10, (1298-1313), Online publication date: 1-Oct-2005.
  171. ACM
    Nguyen N, Dominguez A and Barua R Memory allocation for embedded systems with a compile-time-unknown scratch-pad size Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, (115-125)
  172. ACM
    Beznosov K Flooding and recycling authorizations Proceedings of the 2005 workshop on New security paradigms, (67-72)
  173. Tverdyshev S System description Proceedings of the 5th international conference on Frontiers of Combining Systems, (302-309)
  174. Leinenbach D, Paul W and Petrova E Towards the Formal Verification of a C0 Compiler Proceedings of the Third IEEE International Conference on Software Engineering and Formal Methods, (2-12)
  175. ACM
    In der Rieden T and Knapp S An approach to the pervasive formal specification and verification of an automotive system Proceedings of the 10th international workshop on Formal methods for industrial critical systems, (115-124)
  176. Valera A, Seah W and Rao S (2005). Improving Protocol Robustness in Ad Hoc Networks through Cooperative Packet Caching and Shortest Multipath Routing, IEEE Transactions on Mobile Computing, 4:5, (443-457), Online publication date: 1-Sep-2005.
  177. Gargano M, Hillebrand M, Leinenbach D and Paul W On the correctness of operating system kernels Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics, (1-16)
  178. Brodal G and Moruz G Tradeoffs between branch mispredictions and comparisons for sorting algorithms Proceedings of the 9th international conference on Algorithms and Data Structures, (385-395)
  179. Berić A, Haan G, Sethuraman R and Meerbergen J (2005). An Efficient Picture-Rate Up-Converter, Journal of VLSI Signal Processing Systems, 41:1, (49-63), Online publication date: 1-Aug-2005.
  180. ACM
    Najafzadeh H and Chaiken S Towards a framework for source code instrumentation measurement validation Proceedings of the 5th international workshop on Software and performance, (123-130)
  181. ACM
    Lee J and Mooney V (2005). An o(min(m, n)) parallel deadlock detection algorithm, ACM Transactions on Design Automation of Electronic Systems, 10:3, (573-586), Online publication date: 1-Jul-2005.
  182. ACM
    Paul J, Thomas D and Cassidy A (2005). High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors, ACM Transactions on Design Automation of Electronic Systems, 10:3, (431-461), Online publication date: 1-Jul-2005.
  183. Chang Y and Lai F (2005). Dynamic Zero-Sensitivity Scheme for Low-Power Cache Memories, IEEE Micro, 25:4, (20-32), Online publication date: 1-Jul-2005.
  184. ACM
    Goldfeder C Frequency-based code placement for embedded multiprocessors Proceedings of the 42nd annual Design Automation Conference, (696-699)
  185. Swaminathan A, Mao Y, Wu M and Kailas K Data hiding in compiled program binaries for enhancing computer system performance Proceedings of the 7th international conference on Information Hiding, (357-371)
  186. Hoeflinger J and De Supinski B The OpenMP memory model Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming, (167-177)
  187. ACM
    Lai C, Lu S, Chen Y and Chen T Improving branch prediction accuracy with parallel conservative correctors Proceedings of the 2nd conference on Computing frontiers, (334-341)
  188. ACM
    Silva M Sparse matrix storage revisited Proceedings of the 2nd conference on Computing frontiers, (230-235)
  189. Jin R and Agrawal G (2005). A methodology for detailed performance modeling of reduction computations on SMP machines, Performance Evaluation, 60:1-4, (73-105), Online publication date: 1-May-2005.
  190. Draper J, Barrett J, Sondeen J, Mediratta S, Kang C, Kim I and Daglikoca G (2005). A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System, Journal of VLSI Signal Processing Systems, 40:1, (73-84), Online publication date: 1-May-2005.
  191. Nakka N, Saggese G, Kalbarczyk Z and Iyer R An architectural framework for detecting process hangs/crashes Proceedings of the 5th European conference on Dependable Computing, (103-121)
  192. ACM
    Bai R, Kim N, Sylvester D and Mudge T Total leakage optimization strategies for multi-level caches Proceedings of the 15th ACM Great Lakes symposium on VLSI, (381-384)
  193. Zhou X, Huo Z, Sun N and Zhou Y Impact of Page Size on Communication Performance Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9 - Volume 10
  194. Dong J, Krzyzak A and Suen C (2005). Fast SVM Training Algorithm with Decomposition on Very Large Data Sets, IEEE Transactions on Pattern Analysis and Machine Intelligence, 27:4, (603-618), Online publication date: 1-Apr-2005.
  195. Li X, Garzaran M and Padua D Optimizing Sorting with Genetic Algorithms Proceedings of the international symposium on Code generation and optimization, (99-110)
  196. Hung A, Bishop W and Kennings A Symmetric Multiprocessing on Programmable Chips Made Easy Proceedings of the conference on Design, Automation and Test in Europe - Volume 1, (240-245)
  197. Francesco P, Antonio P and Marchal P Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture Proceedings of the conference on Design, Automation and Test in Europe - Volume 2, (736-741)
  198. ACM
    Haskins J and Skadron K (2005). Accelerated warmup for sampled microarchitecture simulation, ACM Transactions on Architecture and Code Optimization, 2:1, (78-108), Online publication date: 1-Mar-2005.
  199. ACM
    Ekman M, Warg F and Nilsson J (2005). An in-depth look at computer performance growth, ACM SIGARCH Computer Architecture News, 33:1, (144-147), Online publication date: 1-Mar-2005.
  200. Zarandi H and Sarbazi-Azad H (2005). Hierarchical Binary Set Partitioning in Cache Memories, The Journal of Supercomputing, 31:2, (185-202), Online publication date: 1-Feb-2005.
  201. ACM
    Lee J and Mooney V A novel O(n) parallel banker's algorithm for System-on-a-Chip Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (1304-1308)
  202. ACM
    Kobayashi K, Aramoto M, Yuyama Y, Higuchi A and Onodera H A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (619-622)
  203. ACM
    Wang H, Rodriguez S, Dirik C, Gole A, Chan V and Jacob B TERPS Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (1-2)
  204. ACM
    Li T, Zhu D, Liang L, Guo Y and Li S Automatic functional test program generation for microprocessor verification Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (1039-1042)
  205. Jin R, Yang G and Agrawal G (2005). Shared Memory Parallelization of Data Mining Algorithms, IEEE Transactions on Knowledge and Data Engineering, 17:1, (71-89), Online publication date: 1-Jan-2005.
  206. Wang L and Olariu S (2004). A Two-Zone Hybrid Routing Protocol for Mobile Ad Hoc Networks, IEEE Transactions on Parallel and Distributed Systems, 15:12, (1105-1116), Online publication date: 1-Dec-2004.
  207. Chandra V, Schmit H, Xu A and Pileggi L A power aware system level interconnect design methodology for latency-insensitive systems Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, (275-282)
  208. Kee Y, Casanova H and Chien A Realistic Modeling and Svnthesis of Resources for Computational Grids Proceedings of the 2004 ACM/IEEE conference on Supercomputing
  209. Nieuwland A and Kleihorst R (2004). IC Cost Reduction by Applying Embedded Fault Tolerance for Soft Errors, Journal of Electronic Testing: Theory and Applications, 20:5, (533-542), Online publication date: 1-Oct-2004.
  210. Moraes F, Calazans N, Mello A, Möller L and Ost L (2004). HERMES, Integration, the VLSI Journal, 38:1, (69-93), Online publication date: 1-Oct-2004.
  211. Kim S, Chandra D and Solihin Y Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques, (111-122)
  212. ACM
    Park S, Lee Y and Shin H An experimental analysis of the effect of the operating system on memory performance in embedded multimedia computing Proceedings of the 4th ACM international conference on Embedded software, (26-33)
  213. ACM
    Liu M, Zhuge Q, Shao Z and Sha E General loop fusion technique for nested loops considering timing and code size Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, (190-201)
  214. ACM
    Lee J and Mooney V A novel deadlock avoidance algorithm and its hardware implementation Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (200-205)
  215. ACM
    Verma M, Wehmeyer L and Marwedel P Dynamic overlay of scratchpad memory for energy minimization Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (104-109)
  216. ACM
    Mashey J (2004). War of the benchmark means, ACM SIGARCH Computer Architecture News, 32:4, (1-14), Online publication date: 1-Sep-2004.
  217. Park J, Penner M and Prasanna V (2004). Optimizing Graph Algorithms for Improved Cache Performance, IEEE Transactions on Parallel and Distributed Systems, 15:9, (769-782), Online publication date: 1-Sep-2004.
  218. Song Y, Xu R, Wang C and Li Z (2004). Improving Data Locality by Array Contraction, IEEE Transactions on Computers, 53:9, (1073-1084), Online publication date: 1-Sep-2004.
  219. Harizopoulos S and Ailamaki A Steps towards cache-resident transaction processing Proceedings of the Thirtieth international conference on Very large data bases - Volume 30, (660-671)
  220. Sekanina L (2004). Evolvable computing by means of evolvable components, Natural Computing: an international journal, 3:3, (253.5-292), Online publication date: 1-Aug-2004.
  221. Cui B, Ooi B, Su J and Tan K (2004). Main Memory Indexing, IEEE Transactions on Knowledge and Data Engineering, 16:7, (870-874), Online publication date: 1-Jul-2004.
  222. ACM
    Zhang W Enhancing data cache reliability by the addition of a small fully-associative replication cache Proceedings of the 18th annual international conference on Supercomputing, (12-19)
  223. ACM
    Natarajan C, Christenson B and Briggs F A study of performance impact of memory controller features in multi-processor server environment Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture, (80-87)
  224. ACM
    Ibbett R A simulation applet for microcoding exercises Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture, (23-es)
  225. ACM
    Misev A and Gusev M Visual simulator for ILP dynamic OOO processor Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture, (18-es)
  226. ACM
    Bečvář M Teaching basics of instruction pipelining with HDLDLX Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture, (16-es)
  227. ACM
    Sugawara Y and Hiraki K A computer architecture education curriculum through the design and implementation of original processors using FPGAs Proceedings of the 2004 workshop on Computer architecture education: held in conjunction with the 31st International Symposium on Computer Architecture, (3-es)
  228. ACM
    Brifault K and Charles H (2003). Data cache management on EPIC architecture, ACM SIGARCH Computer Architecture News, 32:3, (35-42), Online publication date: 1-Jun-2004.
  229. Corno F, Sanchez E, Reorda M and Squillero G (2004). Code Generation for Functional Validation of Pipelined Microprocessors, Journal of Electronic Testing: Theory and Applications, 20:3, (269-278), Online publication date: 1-Jun-2004.
  230. Xue J and Vera X (2004). Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior, IEEE Transactions on Computers, 53:5, (547-566), Online publication date: 1-May-2004.
  231. ACM
    Glesner M, Hollstein T, Indrusiak L, Zipf P, Pionteck T, Petrov M, Zimmer H and Murgan T Reconfigurable platforms for ubiquitous computing Proceedings of the 1st conference on Computing frontiers, (377-389)
  232. ACM
    Park Y and Lee G Repairing return address stack for buffer overflow protection Proceedings of the 1st conference on Computing frontiers, (335-342)
  233. ACM
    Driscoll J, Butler R and Key J A virtual machine environment for teaching the development of system software Proceedings of the 42nd annual Southeast regional conference, (440-441)
  234. ACM
    Kerns D and Eggers S (2004). Balanced scheduling, ACM SIGPLAN Notices, 39:4, (515-527), Online publication date: 1-Apr-2004.
  235. Tran N and Reed D (2004). Automatic ARIMA Time Series Modeling for Adaptive I/O Prefetching, IEEE Transactions on Parallel and Distributed Systems, 15:4, (362-377), Online publication date: 1-Apr-2004.
  236. ACM
    Jung-Wook P, Cheong-Ghil K, Jung-Hoon L and Shin-Dug K An energy efficient cache memory architecture for embedded systems Proceedings of the 2004 ACM symposium on Applied computing, (884-890)
  237. ACM
    Panis C, Hirnschrott U, Laure G, Lazian W and Nurmi J DSPxPlore Proceedings of the 2004 ACM symposium on Applied computing, (876-883)
  238. ACM
    Hays W (2004). DSPs: Back to the Future, Queue, 2:1, (42-51), Online publication date: 1-Mar-2004.
  239. Hsu C and Kremer U (2004). A Quantitative Analysis of Tile Size Selection Algorithms, The Journal of Supercomputing, 27:3, (279-294), Online publication date: 1-Mar-2004.
  240. Chen S, Xu J, Kalbarczyk Z, Iyer R and Whisnant K (2004). Modeling and evaluating the security threats of transient errors in firewall software, Performance Evaluation, 56:1-4, (53-72), Online publication date: 1-Mar-2004.
  241. ACM
    Cong J, Fan Y, Han G and Zhang Z Application-specific instruction generation for configurable processor architectures Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays, (183-189)
  242. Bolado M, Posadas H, Castillo J, Huerta P, Sánchez P, Sánchez C, Fouren H and Blasco F Platform Based on Open-Source Cores for Industrial Applications Proceedings of the conference on Design, automation and test in Europe - Volume 2
  243. Choi K, Soma R and Pedram M Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Trade-Off Based on the Ratio of Off-Chip Access to On-Chip Computation Times Proceedings of the conference on Design, automation and test in Europe - Volume 1
  244. Paschalis A and Gizopoulos D Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors Proceedings of the conference on Design, automation and test in Europe - Volume 1
  245. Zhang Y, Haga S and Barua R (2004). Execution History Guided Instruction Prefetching, The Journal of Supercomputing, 27:2, (129-147), Online publication date: 1-Feb-2004.
  246. ACM
    Najafzadeh H and Chaiken S Validated observation and reporting of microscopic performance using Pentium II counter facilities Proceedings of the 4th international workshop on Software and performance, (161-165)
  247. Williams K and Esser R Verification of the Futurebus+ cache coherence protocol Proceedings of the 27th Australasian conference on Computer science - Volume 26, (65-71)
  248. Saponara S, Denolf K, Lafruit G, Blanch C and Bormans J (2004). Performance and complexity co-evaluation of the advanced video coding standard for cost-effective multimedia communications, EURASIP Journal on Advances in Signal Processing, 2004, (220-235), Online publication date: 1-Jan-2004.
  249. ACM
    Najafzadeh H and Chaiken S (2004). Validated observation and reporting of microscopic performance using Pentium II counter facilities, ACM SIGSOFT Software Engineering Notes, 29:1, (161-165), Online publication date: 1-Jan-2004.
  250. The ephemeral history register Proceedings of the Second ACM/IEEE International Conference on Formal Methods and Models for Co-Design, (189-198)
  251. Akgul B, Mooney III V, Thane H and Kuacharoen P Hardware Support for Priority Inheritance Proceedings of the 24th IEEE International Real-Time Systems Symposium
  252. Sankaralingam K, Keckler S, Mark W and Burger D Universal Mechanisms for Data-Parallel Architectures Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
  253. Cheresiz D, Juurlink B, Vassiliadis S and Wijshoff H (2003). Implementation of a streaming execution unit, Journal of Systems Architecture: the EUROMICRO Journal, 49:12-15, (599-617), Online publication date: 1-Dec-2003.
  254. ACM
    Mohan T, Supinski B, McKee S, Mueller F, Yoo A and Schulz M Identifying and Exploiting Spatial Regularity in Data Memory References Proceedings of the 2003 ACM/IEEE conference on Supercomputing
  255. Scholz S (2003). Single Assignment C: efficient support for high-level array operations in a functional setting, Journal of Functional Programming, 13:6, (1005-1059), Online publication date: 1-Nov-2003.
  256. ACM
    Park C, Seo J, Bae S, Kim H, Kim S and Kim B A low-cost memory architecture with NAND XIP for mobile embedded systems Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (138-143)
  257. Mamidipaka M, Hirschberg D and Dutt N (2003). Adaptive low-power address encoding techniques using self-organizing lists, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11:5, (827-834), Online publication date: 1-Oct-2003.
  258. ACM
    Brifault K and Charles H Data cache management on EPIC architecture Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture, (35-42)
  259. ACM
    Thorup M (2003). Combinatorial power in multimedia processors, ACM SIGARCH Computer Architecture News, 31:4, (5-11), Online publication date: 1-Sep-2003.
  260. ACM
    Shivam P and Chase J On the elusive benefits of protocol offload Proceedings of the ACM SIGCOMM workshop on Network-I/O convergence: experience, lessons, implications, (179-184)
  261. ACM
    Moshovos A Checkpointing alternatives for high performance, power-aware processors Proceedings of the 2003 international symposium on Low power electronics and design, (318-321)
  262. ACM
    Li T and John L Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving Proceedings of the 2003 international symposium on Low power electronics and design, (241-246)
  263. Braun T, Scheetz T, Webster G, Clark A, Stone E, Sheffield V and Casavant T (2003). Identifying Candidate Disease Genes with High-Performance Computing, The Journal of Supercomputing, 26:1, (7-24), Online publication date: 1-Aug-2003.
  264. ACM
    Vanbroekhoven P, Janssens G, Bruynooghe M, Corporaal H and Catthoor F (2003). Advanced copy propagation for arrays, ACM SIGPLAN Notices, 38:7, (24-33), Online publication date: 11-Jul-2003.
  265. Raghavan P, Shachnai H and Yaniv M (2003). Dynamic schemes for speculative execution of code, Performance Evaluation, 53:2, (125-142), Online publication date: 1-Jul-2003.
  266. ACM
    Hankins R and Patel J Effect of node size on the performance of cache-conscious B+-trees Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, (283-294)
  267. ACM
    Vanbroekhoven P, Janssens G, Bruynooghe M, Corporaal H and Catthoor F Advanced copy propagation for arrays Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems, (24-33)
  268. ACM
    Hankins R and Patel J (2003). Effect of node size on the performance of cache-conscious B+-trees, ACM SIGMETRICS Performance Evaluation Review, 31:1, (283-294), Online publication date: 10-Jun-2003.
  269. ACM
    Suh J, Kim E, Crago S, Srinivasan L and French M A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels Proceedings of the 30th annual international symposium on Computer architecture, (410-421)
  270. ACM
    Zhang C, Vahid F and Najjar W A highly configurable cache architecture for embedded systems Proceedings of the 30th annual international symposium on Computer architecture, (136-146)
  271. ACM
    Yotov K, Li X, Ren G, Cibulskis M, DeJong G, Garzaran M, Padua D, Pingali K, Stodghill P and Wu P A comparison of empirical and model-driven optimization Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation, (63-76)
  272. ACM
    Marwedel P and Sirocic B Multimedia components for the visualization of dynamic behavior in computer architectures Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer Architecture, (13-es)
  273. ACM
    Blome J, Vachharajani M, Vachharajani N and August D The liberty simulation environment as a pedagogical tool Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer Architecture, (12-es)
  274. ACM
    Li X, Mitra T and Roychoudhury A Accurate timing analysis by modeling caches, speculation and their interaction Proceedings of the 40th annual Design Automation Conference, (466-471)
  275. ACM
    Nohl A, Greive V, Braun G, Andreas A, Leupers R, Schliebusch O and Meyr H Instruction encoding synthesis for architecture exploration using hierarchical processor models Proceedings of the 40th annual Design Automation Conference, (262-267)
  276. ACM
    Tan E and Heinzelman W (2003). DSP architectures, ACM SIGARCH Computer Architecture News, 31:3, (6-19), Online publication date: 1-Jun-2003.
  277. ACM
    Aycock J (2003). A brief history of just-in-time, ACM Computing Surveys, 35:2, (97-113), Online publication date: 1-Jun-2003.
  278. Vermeulen F, Catthoor F, Nachtergaele L, Verkest D and De Man H (2003). Power-efficient flexible processor architecture for embedded applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11:3, (376-385), Online publication date: 1-Jun-2003.
  279. Engblom J Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
  280. ACM
    Broder A, Najork M and Wiener J Efficient URL caching for world wide web crawling Proceedings of the 12th international conference on World Wide Web, (679-689)
  281. ACM
    Yotov K, Li X, Ren G, Cibulskis M, DeJong G, Garzaran M, Padua D, Pingali K, Stodghill P and Wu P (2003). A comparison of empirical and model-driven optimization, ACM SIGPLAN Notices, 38:5, (63-76), Online publication date: 9-May-2003.
  282. ACM
    Suh J, Kim E, Crago S, Srinivasan L and French M (2003). A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels, ACM SIGARCH Computer Architecture News, 31:2, (410-421), Online publication date: 1-May-2003.
  283. ACM
    Zhang C, Vahid F and Najjar W (2003). A highly configurable cache architecture for embedded systems, ACM SIGARCH Computer Architecture News, 31:2, (136-146), Online publication date: 1-May-2003.
  284. ACM
    Palermo G, Sam M, Silvan C, Zaccari V and Zafalo R Branch prediction techniques for low-power VLIW processors Proceedings of the 13th ACM Great Lakes symposium on VLSI, (225-228)
  285. Corno F and Squillero G An enhanced framework for microprocessor test-program generation Proceedings of the 6th European conference on Genetic programming, (307-316)
  286. Gagnon E and Hendren L Effective inline-threaded interpretation of Java bytecode using preparation sequences Proceedings of the 12th international conference on Compiler construction, (170-184)
  287. ACM
    Barrett R, Chen Y and Maglio P System administrators are users, too CHI '03 Extended Abstracts on Human Factors in Computing Systems, (1068-1069)
  288. Kandemir M, Choudhary A, Ramanujam J and Banerjee P (2003). Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework, IEEE Transactions on Parallel and Distributed Systems, 14:4, (337-354), Online publication date: 1-Apr-2003.
  289. Drinić M, Kirovski D and Vo H Code optimization for code compression Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, (315-324)
  290. Scott K, Kumar N, Velusamy S, Childers B, Davidson J and Soffa M Retargetable and reconfigurable software dynamic translation Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, (36-47)
  291. ACM
    Corno F, Cumani G, Reorda M and Squillero G Automatic test program generation for pipelined processors Proceedings of the 2003 ACM symposium on Applied computing, (736-740)
  292. Andriahantenaina A and Greiner A Micro-Network for SoC Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  293. Kin J and Pino J Multithreaded Synchronous Data Flow Simulation Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  294. Haga S, Reeves N, Barua R and Marculescu D Dynamic Functional Unit Assignment for Low Power Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  295. Corno F, Cumani G, Sonza Reorda M and Squillero G Fully Automatic Test Program Generation for Microprocessor Cores Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  296. Agarwal A, Roy K and Vijaykumar T Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  297. Zivkovic V, de Kock E, van der Wolf P and Deprettere E Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  298. Lv T, Henkel J, Lekatsas H and Wolf W Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address Buses Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
  299. Paulin P, Pilkington C and Bensoudane E Network Processing Challenges and an Experimental NPU Platform Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
  300. Glökler T, Hoffmann A and Meyr H (2003). Methodical Low-Power ASIP Design Space Exploration, Journal of VLSI Signal Processing Systems, 33:3, (229-246), Online publication date: 1-Mar-2003.
  301. Ivanov L (2003). Hardware courses and the undergraduate computer science curriculum at small colleges, Journal of Computing Sciences in Colleges, 18:3, (177-184), Online publication date: 1-Feb-2003.
  302. Cirne W and Berman F (2003). When the Herd Is Smart, IEEE Transactions on Parallel and Distributed Systems, 14:2, (181-192), Online publication date: 1-Feb-2003.
  303. ACM
    Yasufuku K, Ogawa R, Iwai K and Amano H MAPLE chip Proceedings of the 2003 Asia and South Pacific Design Automation Conference, (575-576)
  304. ACM
    Lee S, Kim I and Choi L Branch predictor design and performance estimation for a high performance embedded microprocessor Proceedings of the 2003 Asia and South Pacific Design Automation Conference, (519-522)
  305. ACM
    Aghaghiri Y, Fallah F and Pedram M BEAM Proceedings of the 2003 Asia and South Pacific Design Automation Conference, (3-8)
  306. Bell R and John L Interface Design Techniques for Single-Chip Systems Proceedings of the 16th International Conference on VLSI Design
  307. Amir A, Landau G and Sokol D (2003). Inplace run-length 2d compressed search, Theoretical Computer Science, 290:3, (1361-1383), Online publication date: 3-Jan-2003.
  308. Oehler R Reduced instruction set computer (RISC) Encyclopedia of Computer Science, (1510-1511)
  309. Baer J Mutual exclusion Encyclopedia of Computer Science, (1215-1216)
  310. Wittie L Microprocessors and microcomputers Encyclopedia of Computer Science, (1161-1169)
  311. Gelsinger P and Colwell R Microcomputer chip Encyclopedia of Computer Science, (1157-1160)
  312. Smith A Cache memory Encyclopedia of Computer Science, (180-187)
  313. ACM
    Wickremesinghe R, Arge L, Chase J and Vitter J (2002). Efficient sorting using registers and caches, ACM Journal of Experimental Algorithmics, 7, (9), Online publication date: 31-Dec-2003.
  314. ACM
    Cooksey R, Jourdan S and Grunwald D (2002). A stateless, content-directed data prefetching mechanism, ACM SIGOPS Operating Systems Review, 36:5, (279-290), Online publication date: 1-Dec-2002.
  315. ACM
    Martínez J and Torrellas J (2002). Speculative synchronization, ACM SIGOPS Operating Systems Review, 36:5, (18-29), Online publication date: 1-Dec-2002.
  316. ACM
    Cooksey R, Jourdan S and Grunwald D (2002). A stateless, content-directed data prefetching mechanism, ACM SIGARCH Computer Architecture News, 30:5, (279-290), Online publication date: 1-Dec-2002.
  317. ACM
    Martínez J and Torrellas J (2002). Speculative synchronization, ACM SIGARCH Computer Architecture News, 30:5, (18-29), Online publication date: 1-Dec-2002.
  318. Mihal A, Kulkarni C, Moskewicz M, Tsai M, Shah N, Weber S, Jin Y, Keutzer K, Sauer C, Vissers K and Malik S (2002). Developing Architectural Platforms, IEEE Design & Test, 19:6, (6-16), Online publication date: 1-Nov-2002.
  319. ACM
    Ward M and Audsley N Hardware implementation of the Ravenscar Ada tasking profile Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, (59-68)
  320. ACM
    Cooksey R, Jourdan S and Grunwald D A stateless, content-directed data prefetching mechanism Proceedings of the 10th international conference on Architectural support for programming languages and operating systems, (279-290)
  321. ACM
    Martínez J and Torrellas J Speculative synchronization Proceedings of the 10th international conference on Architectural support for programming languages and operating systems, (18-29)
  322. ACM
    Beltrame G, Brandolese C, Fornaciari W, Salice F, Sciuto D and Trianni V Modeling assembly instruction timing in superscalar architectures Proceedings of the 15th international symposium on System Synthesis, (132-137)
  323. ACM
    Mitra T, Roychoudhury A and Li X Timing analysis of embedded software for speculative processors Proceedings of the 15th international symposium on System Synthesis, (126-131)
  324. ACM
    Cooksey R, Jourdan S and Grunwald D (2002). A stateless, content-directed data prefetching mechanism, ACM SIGPLAN Notices, 37:10, (279-290), Online publication date: 1-Oct-2002.
  325. ACM
    Martínez J and Torrellas J (2002). Speculative synchronization, ACM SIGPLAN Notices, 37:10, (18-29), Online publication date: 1-Oct-2002.
  326. Chamberlain R, Franklin M and Baw C (2002). Gemini, IEEE Transactions on Parallel and Distributed Systems, 13:10, (1038-1055), Online publication date: 1-Oct-2002.
  327. Datta A and Thomas H (2002). Querying Compressed Data in Data Warehouses, Information Technology and Management, 3:4, (353-386), Online publication date: 1-Oct-2002.
  328. Wolf F, Staschulat J and Ernst R (2002). Hybrid Cache Analysis in Running Time Verification of Embedded Software, Design Automation for Embedded Systems, 7:3, (271-295), Online publication date: 1-Oct-2002.
  329. Wang Z, McKinley K, Rosenberg A and Weems C Using the Compiler to Improve Cache Replacement Decisions Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
  330. Ortega D, Ayguadé E, Baer J and Valero M Cost-Effective Compiler Directed Memory Prefetching and Bypassing Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques, (189-198)
  331. ACM
    Ibbett R (2002). WWW visualisation of computer architecture simulations, ACM SIGCSE Bulletin, 34:3, (247-247), Online publication date: 1-Sep-2002.
  332. Barat F, Lauwereins R and Deconinck G (2002). Reconfigurable Instruction Set Processors from a Hardware/Software Perspective, IEEE Transactions on Software Engineering, 28:9, (847-862), Online publication date: 1-Sep-2002.
  333. Xu J and Singhal M (2002). Cost-Effective Flow Table Designs for High-Speed Routers, IEEE Transactions on Computers, 51:9, (1089-1099), Online publication date: 1-Sep-2002.
  334. ACM
    Aghaghiri Y, Pedram M and Fallah F Reducing transitions on memory buses using sector-based encoding technique Proceedings of the 2002 international symposium on Low power electronics and design, (190-195)
  335. ACM
    Efthymiou A and Garside J An adaptive serial-parallel CAM architecture for low-power cache blocks Proceedings of the 2002 international symposium on Low power electronics and design, (136-141)
  336. ACM
    Okuma T, Cao Y, Muroyama M and Yasuura H Reducing access energy of on-chip data memory considering active data bitwidth Proceedings of the 2002 international symposium on Low power electronics and design, (88-91)
  337. ACM
    Azizi N, Moshovos A and Najm F Low-leakage asymmetric-cell SRAM Proceedings of the 2002 international symposium on Low power electronics and design, (48-51)
  338. ACM
    Maxwell M and Cameron K (2002). Optimizing application performance, XRDS: Crossroads, The ACM Magazine for Students, 8:5, (3-3), Online publication date: 1-Aug-2002.
  339. ACM
    Greenwald M Two-handed emulation Proceedings of the twenty-first annual symposium on Principles of distributed computing, (260-269)
  340. ACM
    Milner C and Davidson J (2002). Quick piping, ACM SIGPLAN Notices, 37:7, (175-184), Online publication date: 17-Jul-2002.
  341. Ghosh S (2002). The Role of Modeling and Asynchronous Distributed Simulation in Analyzing Complex Systems of the Future, Information Systems Frontiers, 4:2, (161-177), Online publication date: 1-Jul-2002.
  342. Baker A, Dennis J and Jessup E Toward memory-efficient linear solvers Proceedings of the 5th international conference on High performance computing for computational science, (315-328)
  343. ACM
    Ibbett R WWW visualisation of computer architecture simulations Proceedings of the 7th annual conference on Innovation and technology in computer science education, (247-247)
  344. ACM
    Carter L and Calder B Using predicate path information in hardware to determine true dependences Proceedings of the 16th international conference on Supercomputing, (230-240)
  345. ACM
    Zhang Y, Haga S and Barua R Execution history guided instruction prefetching Proceedings of the 16th international conference on Supercomputing, (199-208)
  346. ACM
    Draper J, Chame J, Hall M, Steele C, Barrett T, LaCoss J, Granacki J, Shin J, Chen C, Kang C, Kim I and Daglikoca G The architecture of the DIVA processing-in-memory chip Proceedings of the 16th international conference on Supercomputing, (14-25)
  347. ACM
    Milner C and Davidson J Quick piping Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems, (175-184)
  348. ACM
    Jin R and Agrawal G Performance prediction for random write reductions Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, (117-128)
  349. ACM
    Wolf F, Staschulat J and Ernst R Associative caches in formal software timing analysis Proceedings of the 39th annual Design Automation Conference, (622-627)
  350. ACM
    Agarwal A, Li H and Roy K DRG-cache Proceedings of the 39th annual Design Automation Conference, (473-478)
  351. ACM
    Zhou J and Ross K Implementing database operations using SIMD instructions Proceedings of the 2002 ACM SIGMOD international conference on Management of data, (145-156)
  352. ACM
    Jin R and Agrawal G (2002). Performance prediction for random write reductions, ACM SIGMETRICS Performance Evaluation Review, 30:1, (117-128), Online publication date: 1-Jun-2002.
  353. Sorin D, Plakal M, Condon A, Hill M, Martin M and Wood D (2002). Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol, IEEE Transactions on Parallel and Distributed Systems, 13:6, (556-578), Online publication date: 1-Jun-2002.
  354. (2002). Computer arithmetic and hardware, Theoretical Computer Science, 279:1-2, (3-27), Online publication date: 28-May-2002.
  355. ACM
    Yurcik W and Gehringer E A survey of web resources for teaching computer architecture Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture, (23-es)
  356. ACM
    Tabak D ILP in the undergraduate curriculum Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture, (18-es)
  357. ACM
    Weaver C, Larson E and Austin T Effective support of simulation in computer architecture instruction Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture, (9-es)
  358. ACM
    Ellard D, Holland D, Murphy N and Seltzer M On the design of a new CPU architecture for pedagogical purposes Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture, (6-es)
  359. ACM
    Stan M and Skadron K Teaching processor architecture with a VLSI perspective Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture, (3-es)
  360. Kim I and Lipasti M Implementing optimizations at decode time Proceedings of the 29th annual international symposium on Computer architecture, (221-232)
  361. Vijaykumar T, Pomeranz I and Cheng K Transient-fault recovery using simultaneous multithreading Proceedings of the 29th annual international symposium on Computer architecture, (87-98)
  362. Ernst D and Austin T Efficient dynamic scheduling through tag elimination Proceedings of the 29th annual international symposium on Computer architecture, (37-46)
  363. ACM
    Petrov P and Orailoglu A Energy frugal tags in reprogrammable I-caches for application-specific embedded processors Proceedings of the tenth international symposium on Hardware/software codesign, (181-186)
  364. ACM
    Soininen J, Kreku J, Qu Y and Forsell M Fast processor core selection for WLAN modem using mappability estimation Proceedings of the tenth international symposium on Hardware/software codesign, (61-66)
  365. ACM
    Kim I and Lipasti M (2002). Implementing optimizations at decode time, ACM SIGARCH Computer Architecture News, 30:2, (221-232), Online publication date: 1-May-2002.
  366. ACM
    Vijaykumar T, Pomeranz I and Cheng K (2002). Transient-fault recovery using simultaneous multithreading, ACM SIGARCH Computer Architecture News, 30:2, (87-98), Online publication date: 1-May-2002.
  367. ACM
    Ernst D and Austin T (2002). Efficient dynamic scheduling through tag elimination, ACM SIGARCH Computer Architecture News, 30:2, (37-46), Online publication date: 1-May-2002.
  368. Suh J, Kang D and Crago S Dynamic Power Management of Multiprocessor Systems Proceedings of the 16th International Parallel and Distributed Processing Symposium
  369. Ashmawy A, Ismail H and Fahmy A Hybrid Predication Model for Instruction Level Parallelism Proceedings of the 16th International Parallel and Distributed Processing Symposium
  370. Hollmann J, Ardö A and Stenström P Empirical Observations Regarding Predictability in User Access-Behavior in a Distributed Digital Library System Proceedings of the 16th International Parallel and Distributed Processing Symposium
  371. Jin R and Agrawal G Design and Evaluation of a High-Level Interface for Data Mining Proceedings of the 16th International Parallel and Distributed Processing Symposium
  372. Park J, Penner M and Prasanna V Optimizing Graph Algorithms for Improved Cache Performance Proceedings of the 16th International Parallel and Distributed Processing Symposium
  373. ACM
    Zhang Y, Hu X and Chen D (2002). Efficient global register allocation for minimizing energy consumption, ACM SIGPLAN Notices, 37:4, (42-53), Online publication date: 1-Apr-2002.
  374. Velev M Using Rewriting Rules and Positive Equality to Formally Verify Wide-Issue Out-of-Order Microprocessors with a Reorder Buffer Proceedings of the conference on Design, automation and test in Europe
  375. ACM
    Wolffe G, Yurcik W, Osborne H and Holliday M (2002). Teaching computer organization/architecture with limited resources using simulators, ACM SIGCSE Bulletin, 34:1, (176-180), Online publication date: 1-Mar-2002.
  376. Xiao L, Chen S and Zhang X (2002). Dynamic Cluster Resource Allocations for Jobs with Known and Unknown Memory Demands, IEEE Transactions on Parallel and Distributed Systems, 13:3, (223-240), Online publication date: 1-Mar-2002.
  377. Berezin S, Clarke E, Biere A and Zhu Y (2002). Verification of Out-Of-Order Processor Designs Using Model Checking and a Light-Weight Completion Function, Formal Methods in System Design, 20:2, (159-186), Online publication date: 1-Mar-2002.
  378. Kandemir M, Choudhary A and Ramanujam J (2002). An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets, The Journal of Supercomputing, 21:3, (257-284), Online publication date: 1-Mar-2002.
  379. Sawada J and Hunt W (2002). Verification of FM9801, Formal Methods in System Design, 20:2, (187-222), Online publication date: 1-Mar-2002.
  380. ACM
    Wolffe G, Yurcik W, Osborne H and Holliday M Teaching computer organization/architecture with limited resources using simulators Proceedings of the 33rd SIGCSE technical symposium on Computer science education, (176-180)
  381. Oh N, Mitra S and McCluskey E (2002). ED4I, IEEE Transactions on Computers, 51:2, (180-199), Online publication date: 1-Feb-2002.
  382. Fernández-Iglesias M, González-Castaño F, Llamas-Nistal M, Pousada-Carballo J and Vales-Alonso J (2002). On the application of formal description techniques to the design of interception systems for GSM mobile terminals, Journal of Systems and Software, 60:1, (51-58), Online publication date: 15-Jan-2002.
  383. Ishihara T and Asada K An Architectural Level Energy Reduction Technique For Deep-Submicron Cache Memories Proceedings of the 2002 Asia and South Pacific Design Automation Conference
  384. Brodal G, Fagerberg R and Jacob R Cache oblivious search trees via binary trees of small height Proceedings of the thirteenth annual ACM-SIAM symposium on Discrete algorithms, (39-48)
  385. Kienhuis B, Deprettere E, van der Wolf P and Vissers K A methodology to design programmble embedded systems Embedded processor design challenges, (18-37)
  386. Chang Y, Ruan S and Lai F (2002). Sentry tag, Australian Computer Science Communications, 24:3, (135-140), Online publication date: 1-Jan-2002.
  387. Soliman M and Sedukhin S (2002). Trident, Australian Computer Science Communications, 24:3, (91-99), Online publication date: 1-Jan-2002.
  388. Chang Y, Ruan S and Lai F Sentry tag Proceedings of the seventh Asia-Pacific conference on Computer systems architecture, (135-140)
  389. Soliman M and Sedukhin S Trident Proceedings of the seventh Asia-Pacific conference on Computer systems architecture, (91-99)
  390. Nalumasu R and Gopalakrishnan G (2002). Deriving Efficient Cache Coherence Protocols Through Refinement, Formal Methods in System Design, 20:1, (107-125), Online publication date: 1-Jan-2002.
  391. ACM
    Rahman N and Raman R (2001). Adapting Radix Sort to the Memory Hierarchy, ACM Journal of Experimental Algorithmics, 6, (7-es), Online publication date: 31-Dec-2002.
  392. ACM
    Liberatore V (2001). Caching and Scheduling for Broadcast Disk Systems, ACM Journal of Experimental Algorithmics, 6, (5-es), Online publication date: 31-Dec-2002.
  393. Altiok T, Xiong W and Gunduc M A capacity planning tool for the tuxedo middleware used in transaction processing systems Proceedings of the 33nd conference on Winter simulation, (502-507)
  394. Krishnaprasad S (2001). Uses and abuses of Amdahl's law, Journal of Computing Sciences in Colleges, 17:2, (288-293), Online publication date: 1-Dec-2001.
  395. ACM
    Wainer G, Daicz S, De Simoni L and Wassermann D (2001). Using the Alfa-1 simulated processor for educational purposes, Journal on Educational Resources in Computing, 1:4, (111-151), Online publication date: 1-Dec-2001.
  396. Kandemir M, Ramanujam J, Choudhary A and Banerjee P (2001). A Layout-Conscious Iteration Space Transformation Technique, IEEE Transactions on Computers, 50:12, (1321-1336), Online publication date: 1-Dec-2001.
  397. ACM
    Ward M and Audsley N Hardware compilation of sequential ada Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, (99-107)
  398. ACM
    Avissar O, Barua R and Stewart D Heterogeneous memory management for embedded systems Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, (34-43)
  399. Beltrame G, Brandolese C, Fornaciari W, Salice F, Sciuto D and Trianni V An assembly-level execution-time model for pipelined architectures Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, (195-200)
  400. Min R and Hu Y (2001). Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses, IEEE Transactions on Computers, 50:11, (1191-1201), Online publication date: 1-Nov-2001.
  401. Cuppu V, Jacob B, Davis B and Mudge T (2001). High-Performance DRAMs in Workstation Environments, IEEE Transactions on Computers, 50:11, (1133-1153), Online publication date: 1-Nov-2001.
  402. Zhang L, Fang Z, Parker M, Mathew B, Schaelicke L, Carter J, Hsieh W and McKee S (2001). The Impulse Memory Controller, IEEE Transactions on Computers, 50:11, (1117-1132), Online publication date: 1-Nov-2001.
  403. ACM
    Xia Y, Kim S, Cho S, Rim K and Bae H Dynamic versioning concurrency control for index-based data access in main memory database systems Proceedings of the tenth international conference on Information and knowledge management, (550-552)
  404. ACM
    Dovrolis C, Thayer B and Ramanathan P (2001). HIP, ACM SIGOPS Operating Systems Review, 35:4, (50-60), Online publication date: 1-Oct-2001.
  405. ACM
    Beltrame G, Brandolese C, Fornaciari W, Salice F, Sciuto D and Trianni V Dynamic modeling of inter-instruction effects for execution time estimation Proceedings of the 14th international symposium on Systems synthesis, (136-141)
  406. ACM
    Chen K, Malik S and August D Retargetable static timing analysis for embedded software Proceedings of the 14th international symposium on Systems synthesis, (39-44)
  407. Ailamaki A, DeWitt D, Hill M and Skounakis M Weaving Relations for Cache Performance Proceedings of the 27th International Conference on Very Large Data Bases, (169-180)
  408. Kandemir M, Banerjee P, Choudhary A, Ramanujam J and Ayguadé E (2001). Static and Dynamic Locality Optimizations Using Integer Linear Programming, IEEE Transactions on Parallel and Distributed Systems, 12:9, (922-941), Online publication date: 1-Sep-2001.
  409. Lee C, Lee K, Hahn J, Seo Y, Min S, Ha R, Hong S, Park C, Lee M and Kim C (2001). Bounding Cache-Related Preemption Delay for Real-Time Systems, IEEE Transactions on Software Engineering, 27:9, (805-826), Online publication date: 1-Sep-2001.
  410. ACM
    Mamidipaka M, Hirschberg D and Dutt N Low power address encoding using self-organizing lists Proceedings of the 2001 international symposium on Low power electronics and design, (188-193)
  411. ACM
    Aghaghiri Y, Fallah F and Pedram M Irredundant address bus encoding for low power Proceedings of the 2001 international symposium on Low power electronics and design, (182-187)
  412. Song Y, Wang C and Li Z Locality enhancement by array contraction Proceedings of the 14th international conference on Languages and compilers for parallel computing, (132-146)
  413. ACM
    Larus J and Parkes M Using Cohort Scheduling to Enhance Server Performance (Extended Abstract) Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems, (182-187)
  414. ACM
    Larus J and Parkes M Using Cohort Scheduling to Enhance Server Performance (Extended Abstract) Proceedings of the ACM SIGPLAN workshop on Languages, compilers and tools for embedded systems, (182-187)
  415. ACM
    Larus J and Parkes M (2001). Using Cohort Scheduling to Enhance Server Performance (Extended Abstract), ACM SIGPLAN Notices, 36:8, (182-187), Online publication date: 1-Aug-2001.
  416. Kavi K, Giorgi R and Arul J (2001). Scheduled Dataflow, IEEE Transactions on Computers, 50:8, (834-846), Online publication date: 1-Aug-2001.
  417. Chang W, Chu C and Wu J (2001). Communication-Free Alignment for Array References with Linear Subscripts in Three Loop Index Variables or Quadratic Subscripts, The Journal of Supercomputing, 20:1, (67-83), Online publication date: 1-Aug-2001.
  418. Weaver C and Austin T A Fault Tolerant Approach to Microprocessor Design Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS), (411-420)
  419. Kim D, Managuli R and Kim Y (2001). Data Cache and Direct Memory Access in Programming Mediaprocessors, IEEE Micro, 21:4, (33-42), Online publication date: 1-Jul-2001.
  420. Heath J and Tan A Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture Proceedings of the 12th International Workshop on Rapid System Prototyping
  421. ACM
    Kohno K and Matsumoto N A new verification methodology for complex pipeline behavior Proceedings of the 38th annual Design Automation Conference, (816-821)
  422. ACM
    Kroening D and Paul W Automated pipeline design Proceedings of the 38th annual Design Automation Conference, (810-815)
  423. ACM
    Velev M and Bryant R Effective use of boolean satisfiability procedures in the formal verification of superscalar and VLIW Proceedings of the 38th annual Design Automation Conference, (226-231)
  424. ACM
    Chilimbi T Efficient representations and abstractions for quantifying and exploiting data reference locality Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation, (191-202)
  425. Wang L and Yang T (2001). On the Boosting of Instruction Scheduling by Renaming, The Journal of Supercomputing, 19:2, (173-197), Online publication date: 9-Jun-2001.
  426. Li Y and Wolf W Hardware/software co-synthesis with memory hierarchies Readings in hardware/software co-design, (265-277)
  427. Ernst R Codesign of embedded systems Readings in hardware/software co-design, (45-54)
  428. ACM
    Kim K, Cha S and Kwon K (2001). Optimizing multidimensional index trees for main memory access, ACM SIGMOD Record, 30:2, (139-150), Online publication date: 1-Jun-2001.
  429. Kalinov A, Lastovetsky A, Ledovskikh I and Posypkin M (2001). Compilation of Vector Statements of C[] Language for Architectures with Multilevel Memory Hierarchy, Programming and Computing Software, 27:3, (111-122), Online publication date: 1-May-2001.
  430. ACM
    Chilimbi T (2001). Efficient representations and abstractions for quantifying and exploiting data reference locality, ACM SIGPLAN Notices, 36:5, (191-202), Online publication date: 1-May-2001.
  431. ACM
    Kim K, Cha S and Kwon K Optimizing multidimensional index trees for main memory access Proceedings of the 2001 ACM SIGMOD international conference on Management of data, (139-150)
  432. Xu C and Chaudhary V (2001). Time Stamp Algorithms for Runtime Parallelization of DOACROSS Loops with Dynamic Dependences, IEEE Transactions on Parallel and Distributed Systems, 12:5, (433-450), Online publication date: 1-May-2001.
  433. Panda P, Dutt N, Nicolau A, Catthoor F, Vandecappelle A, Brockmeyer E, Kulkarni C and De Greef E (2001). Data Memory Organization and Optimizations in Application-Specific Systems, IEEE Design & Test, 18:3, (56-68), Online publication date: 1-May-2001.
  434. Nachtergaele L, Catthoor F and Kulkarni C (2001). Random-Access Data Storage Components in Customized Architectures, IEEE Design & Test, 18:3, (40-54), Online publication date: 1-May-2001.
  435. ACM
    Ascia G, Catania V and Palesi M Parameterised system design based on genetic algorithms Proceedings of the ninth international symposium on Hardware/software codesign, (177-182)
  436. Wilson K and Olukotun K (2001). High Bandwidth On-Chip Cache Design, IEEE Transactions on Computers, 50:4, (292-307), Online publication date: 1-Apr-2001.
  437. Instruction Prediction for Step Power Reduction Proceedings of the 2nd International Symposium on Quality Electronic Design
  438. Kulkarni C, Ghez C, Miranda M, Catthoor F and de Man H Cache conscious data layout organization for embedded multimedia applications Proceedings of the conference on Design, automation and test in Europe, (686-693)
  439. Sami M, Sciuto D, Silvano C, Zaccaria V and Zafalon R Exploiting data forwarding to reduce the power budget of VLIW embedded processors Proceedings of the conference on Design, automation and test in Europe, (252-257)
  440. Hsu W, Smith A and Young H (2001). Characteristics of production database workloads and the TPC benchmarks, IBM Systems Journal, 40:3, (781-802), Online publication date: 1-Mar-2001.
  441. ACM
    Hsu W, Smith A and Young H (2001). I/O reference behavior of production database workloads and the TPC benchmarks—an analysis at the logical level, ACM Transactions on Database Systems, 26:1, (96-143), Online publication date: 1-Mar-2001.
  442. ACM
    Bryant R and O'Hallaron D (2001). Introducing computer systems from a programmer's perspective, ACM SIGCSE Bulletin, 33:1, (90-94), Online publication date: 1-Mar-2001.
  443. Ding C (2001). An Optimal Index Reshuffle Algorithm for Multidimensional Arrays and Its Applications for Parallel Architectures, IEEE Transactions on Parallel and Distributed Systems, 12:3, (306-315), Online publication date: 1-Mar-2001.
  444. Nachtergaele L, Gijbels T, Bormans J, Catthoor F and Bolsens I (2001). Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors, Journal of VLSI Signal Processing Systems, 27:1-2, (161-169), Online publication date: 1-Feb-2001.
  445. ACM
    Bryant R and O'Hallaron D Introducing computer systems from a programmer's perspective Proceedings of the thirty-second SIGCSE technical symposium on Computer Science Education, (90-94)
  446. ACM
    Carrillo J and Chow P The effect of reconfigurable units in superscalar processors Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays, (141-150)
  447. Radhakrishnan R, Vijaykrishnan N, John L, Sivasubramaniam A, Rubio J and Sabarinathan J (2001). Java Runtime Systems, IEEE Transactions on Computers, 50:2, (131-146), Online publication date: 1-Feb-2001.
  448. ACM
    Kitajima A, Itoh M, Sato J, Shiomi A, Takeuchi Y and Imai M Effectiveness of the ASIP design system PEAS-III in design of pipelined processors Proceedings of the 2001 Asia and South Pacific Design Automation Conference, (649-654)
  449. ACM
    Ishihara T and Asada K A system level memory power optimization technique using multiple supply and threshold voltages Proceedings of the 2001 Asia and South Pacific Design Automation Conference, (456-461)
  450. ACM
    Dutt N, Nicolau A, Tomiyama H and Halambi A New directions in compiler technology for embedded systems (embedded tutorial) Proceedings of the 2001 Asia and South Pacific Design Automation Conference, (409-414)
  451. ACM
    Moshnyaga V Reducing cache engery through dual voltage supply Proceedings of the 2001 Asia and South Pacific Design Automation Conference, (302-305)
  452. ACM
    Kobayashi K, Eguchi M, Iwahashi T, Shibayama T, Li X, Takai K and Onodera H A vector-pipeline DSP for low-rate videophones Proceedings of the 2001 Asia and South Pacific Design Automation Conference, (1-2)
  453. Pandurangan G and Upfal E Can entropy characterize performance of online algorithms? Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms, (727-734)
  454. ACM
    Bryant R, German S and Velev M (2001). Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic, ACM Transactions on Computational Logic, 2:1, (93-134), Online publication date: 1-Jan-2001.
  455. Hamacher V and Jiang H (2001). Hierarchical Ring Network Configuration and Performance Modeling, IEEE Transactions on Computers, 50:1, (1-12), Online publication date: 1-Jan-2001.
  456. ACM
    Bojesen J, Katajainen J and Spork M (2000). Performance engineering case study, ACM Journal of Experimental Algorithmics, 5, (15-es), Online publication date: 31-Dec-2001.
  457. ACM
    Rahman N and Raman R (2000). Analysing cache effects in distribution sorting, ACM Journal of Experimental Algorithmics, 5, (14-es), Online publication date: 31-Dec-2001.
  458. ACM
    Sanders P (2000). Fast priority queues for cached memory, ACM Journal of Experimental Algorithmics, 5, (7-es), Online publication date: 31-Dec-2001.
  459. ACM
    Xiao L, Zhang X and Kubricht S (2000). Improving memory performance of sorting algorithms, ACM Journal of Experimental Algorithmics, 5, (3-es), Online publication date: 31-Dec-2001.
  460. ACM
    Zahir R, Ross J, Morris D and Hess D (2000). OS and compiler considerations in the design of the IA-64 architecture, ACM SIGOPS Operating Systems Review, 34:5, (212-221), Online publication date: 1-Dec-2000.
  461. ACM
    Schlosser S, Griffin J, Nagle D and Ganger G (2000). Designing computer systems with MEMS-based storage, ACM SIGOPS Operating Systems Review, 34:5, (1-12), Online publication date: 1-Dec-2000.
  462. ACM
    Zahir R, Ross J, Morris D and Hess D (2000). OS and compiler considerations in the design of the IA-64 architecture, ACM SIGARCH Computer Architecture News, 28:5, (212-221), Online publication date: 1-Dec-2000.
  463. ACM
    Schlosser S, Griffin J, Nagle D and Ganger G (2000). Designing computer systems with MEMS-based storage, ACM SIGARCH Computer Architecture News, 28:5, (1-12), Online publication date: 1-Dec-2000.
  464. ACM
    Kapasi U, Dally W, Rixner S, Mattson P, Owens J and Khailany B Efficient conditional operations for data-parallel architectures Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, (159-170)
  465. ACM
    Chatterjee S, Weaver C and Austin T Efficient checker processor design Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, (87-97)
  466. ACM
    Lee H, Tyson G and Farrens M Eager writeback - a technique for improving bandwidth utilization Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, (11-21)
  467. Krishnaswamy U and Scherson I (2000). A Framework for Computer Performance Evaluation Using Benchmark Sets, IEEE Transactions on Computers, 49:12, (1325-1338), Online publication date: 1-Dec-2000.
  468. ACM
    Zahir R, Ross J, Morris D and Hess D OS and compiler considerations in the design of the IA-64 architecture Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, (212-221)
  469. ACM
    Schlosser S, Griffin J, Nagle D and Ganger G Designing computer systems with MEMS-based storage Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, (1-12)
  470. Hoe J and Arvind Synthesis of operation-centric hardware descriptions Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, (511-519)
  471. Sami M, Sciuto D, Silvano C and Zaccaria V Power exploration for embedded VLIW architectures Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, (498-503)
  472. Browne S, Dongarra J, Garner N, London K and Mucci P A scalable cross-platform infrastructure for application performance tuning using hardware counters Proceedings of the 2000 ACM/IEEE conference on Supercomputing, (42-es)
  473. Gropp W, Kaushik D, Keyes D and Smith B Performance modeling and tuning of an unstructured mesh CFD application Proceedings of the 2000 ACM/IEEE conference on Supercomputing, (34-es)
  474. ACM
    Zahir R, Ross J, Morris D and Hess D (2000). OS and compiler considerations in the design of the IA-64 architecture, ACM SIGPLAN Notices, 35:11, (212-221), Online publication date: 1-Nov-2000.
  475. ACM
    Schlosser S, Griffin J, Nagle D and Ganger G (2000). Designing computer systems with MEMS-based storage, ACM SIGPLAN Notices, 35:11, (1-12), Online publication date: 1-Nov-2000.
  476. Griffin J, Schlosser S, Ganger G and Nagle D Operating system management of MEMS-based storage devices Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
  477. Lever C Linux Kernel hash table behavior Proceedings of the 4th annual Linux Showcase & Conference - Volume 4, (2-2)
  478. ACM
    Pees S, Hoffmann A and Meyr H (2000). Retargetable compiled simulation of embedded processors using a machine description language, ACM Transactions on Design Automation of Electronic Systems, 5:4, (815-834), Online publication date: 1-Oct-2000.
  479. Darte A and Huard G (2000). Loop Shifting for Loop Compaction, International Journal of Parallel Programming, 28:5, (499-534), Online publication date: 1-Oct-2000.
  480. Ezer G Xtensa with User Defined DSP Coprocessor Microarchitectures Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  481. Nadkarni A A Trace Based Evaluation of Speculative Branch Decoupling Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  482. Fuoco C, Comisky D and Mobley C A Multi-Level Memory System Architecture for High-Performance DSP Applications Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  483. Effective Hardware-Based Two-Way Loop Cache for High Performance Low Power Processors Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  484. Analysis of Shared Memory Misses and Reference Patterns Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  485. Architectural Support for Dynamic Memory Management Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  486. Du X, Zhang X and Zhu Z (2000). Memory Hierarchy Considerations for Cost-Effective Cluster Computing, IEEE Transactions on Computers, 49:9, (915-933), Online publication date: 1-Sep-2000.
  487. Haldar M, Nayak A, Kanhere A, Joisha P, Shenoy N, Choudhary A and Banerjee P Match Virtual Machine Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
  488. ACM
    Wilken K, Liu J and Heffernan M Optimal instruction scheduling using integer programming Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation, (121-133)
  489. ACM
    Lucco S Split-stream dictionary program compression Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation, (27-34)
  490. ACM
    Benini L, Macii A and Poncino M A recursive algorithm for low-power memory partitioning Proceedings of the 2000 international symposium on Low power electronics and design, (78-83)
  491. Gao G and Sarkar V (2000). Location Consistency-A New Memory Model and Cache Consistency Protocol, IEEE Transactions on Computers, 49:8, (798-813), Online publication date: 1-Aug-2000.
  492. ACM
    Aspnes J Fast deterministic consensus in a noisy environment Proceedings of the nineteenth annual ACM symposium on Principles of distributed computing, (299-308)
  493. ACM
    Thulasiraman P, Theobald K, Khokhar A and Gao G Multithreaded algorithms for the fast Fourier transform Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures, (176-185)
  494. ACM
    Vishkin U A no-busy-wait balanced tree parallel algorithmic paradigm Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures, (147-155)
  495. ACM
    Agesen O, Detlefs D, Flood C, Garthwaite A, Martin P, Shavit N and Steele G DCAS-based concurrent deques Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures, (137-146)
  496. Flynn M, Hung P and Peymandoust A (2000). Using Simple Tools to Evaluate Complex Architectural Trade-offs, IEEE Micro, 20:4, (67-75), Online publication date: 1-Jul-2000.
  497. Biswas P, Hasegawa A, Mandaville S, Debbage M, Sturges A, Arakawa F, Saito Y and Uchiyama K (2000). SH-5, IEEE Micro, 20:4, (28-39), Online publication date: 1-Jul-2000.
  498. Schulte M, Balzola P, Akkas A and Brocato R (2000). Integer Multiplication with Overflow Detection or Saturation, IEEE Transactions on Computers, 49:7, (681-691), Online publication date: 1-Jul-2000.
  499. ACM
    Benini L, Macii A, Macii E and Poncino M Synthesis of application-specific memories for power optimization in embedded systems Proceedings of the 37th Annual Design Automation Conference, (300-303)
  500. ACM
    Aagaard M, Jones R, Kaivola R, Kohatsu K and Seger C Formal verification of iterative algorithms in microprocessors Proceedings of the 37th Annual Design Automation Conference, (201-206)
  501. ACM
    Velev M and Bryant R Formal verification of superscale microprocessors with multicycle functional units, exception, and branch prediction Proceedings of the 37th Annual Design Automation Conference, (112-117)
  502. ACM
    Rao J and Ross K (2000). Making B+- trees cache conscious in main memory, ACM SIGMOD Record, 29:2, (475-486), Online publication date: 1-Jun-2000.
  503. ACM
    Figueiredo R, Fortes J, Eigenmann R, Kapadia N, Adabala S, Miguel-Alonso J, Taylor V, Livny M, Vidal L and Chen J A network-computing infrastructure for tool experimentation applied to computer architecture education Proceedings of the 2000 workshop on Computer architecture education, (18-es)
  504. ACM
    Wolff M and Wills L SATSim Proceedings of the 2000 workshop on Computer architecture education, (6-es)
  505. ACM
    Hsu W Experiences integrating research tools and projects into computer architecture courses Proceedings of the 2000 workshop on Computer architecture education, (5-es)
  506. Vranken H (2000). Debug Facilities in the TriMedia CPU64 Architecture, Journal of Electronic Testing: Theory and Applications, 16:3, (301-308), Online publication date: 1-Jun-2000.
  507. ACM
    Rao J and Ross K Making B+- trees cache conscious in main memory Proceedings of the 2000 ACM SIGMOD international conference on Management of data, (475-486)
  508. ACM
    Ghosh S, Martonosi M and Malik S Automated cache optimizations using CME driven diagnosis Proceedings of the 14th international conference on Supercomputing, (316-326)
  509. ACM
    Wilken K, Liu J and Heffernan M (2000). Optimal instruction scheduling using integer programming, ACM SIGPLAN Notices, 35:5, (121-133), Online publication date: 1-May-2000.
  510. ACM
    Lucco S (2000). Split-stream dictionary program compression, ACM SIGPLAN Notices, 35:5, (27-34), Online publication date: 1-May-2000.
  511. ACM
    Tomiyama H and Dutt N Program path analysis to bound cache-related preemption delay in preemptive real-time systems Proceedings of the eighth international workshop on Hardware/software codesign, (67-71)
  512. ACM
    Sami M, Sciuto D, Silvano C and Zaccaria V Instruction-level power estimation for embedded VLIW cores Proceedings of the eighth international workshop on Hardware/software codesign, (34-38)
  513. ACM
    Brandolese C, Fornaciari W, Salice F and Sciuto D Energy estimation for 32-bit microprocessors Proceedings of the eighth international workshop on Hardware/software codesign, (24-28)
  514. Healy C, Sjödin M, Rustagi V, Whalley D and Engelen R (2000). Supporting Timing Analysis by Automatic Bounding of LoopIterations, Real-Time Systems, 18:2/3, (129-156), Online publication date: 1-May-2000.
  515. Mueller F (2000). Timing Analysis for Instruction Caches, Real-Time Systems, 18:2/3, (217-247), Online publication date: 1-May-2000.
  516. ACM
    Benini L and Micheli G (2000). System-level power optimization, ACM Transactions on Design Automation of Electronic Systems, 5:2, (115-192), Online publication date: 1-Apr-2000.
  517. Benini L, Macii A, Macii E and Poncino M (2000). Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation, IEEE Design & Test, 17:2, (74-85), Online publication date: 1-Apr-2000.
  518. ACM
    Andronache V, Sha E and Passos N Design and analysis of efficient application-specific on-line page replacement techniques Proceedings of the 10th Great Lakes symposium on VLSI, (123-128)
  519. ACM
    Kreahling W and Norris C Profile assisted register allocation Proceedings of the 2000 ACM symposium on Applied computing - Volume 2, (774-781)
  520. Luo Z and Martonosi M (2000). Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques, IEEE Transactions on Computers, 49:3, (208-218), Online publication date: 1-Mar-2000.
  521. Chang T, Iyengar V and Rudnick E (2000). A Biased Random Instruction Generation Environmentfor Architectural Verification of Pipelined Processors, Journal of Electronic Testing: Theory and Applications, 16:1-2, (13-27), Online publication date: 1-Feb-2000.
  522. ACM
    Kimura S, Kida H, Takagi K, Abematsu T and Watanabe K An application specific Java processor with reconfigurabilities Proceedings of the 2000 Asia and South Pacific Design Automation Conference, (25-26)
  523. ACM
    Rust C, Stappert F, Altenbernd P and Tacken J From high-level specifications down to software implementations of parallel embedded real-time systems Proceedings of the conference on Design, automation and test in Europe, (686-691)
  524. ACM
    Ishihara T and Yasuura H A power reduction technique with object code merging for application specific embedded processors Proceedings of the conference on Design, automation and test in Europe, (617-623)
  525. ACM
    Catthoor F, Dutt N and Kozyrakis C How to solve the current memory access and data transfer bottlenecks Proceedings of the conference on Design, automation and test in Europe, (426-435)
  526. ACM
    Guerrier P and Greiner A A generic architecture for on-chip packet-switched interconnections Proceedings of the conference on Design, automation and test in Europe, (250-256)
  527. ACM
    Eiron N, Rodeh M and Steinwarts I (1999). Matrix multiplication, ACM Journal of Experimental Algorithmics, 4, (3-es), Online publication date: 31-Dec-2000.
  528. White R, Mueller F, Healy C, Whalley D and Harmon M (1999). Timing Analysis for Data and Wrap-Around Fill Caches, Real-Time Systems, 17:2-3, (209-233), Online publication date: 14-Dec-1999.
  529. Ferdinand C and Wilhelm R (1999). Efficient and Precise Cache Behavior Prediction for Real-TimeSystems, Real-Time Systems, 17:2-3, (131-181), Online publication date: 14-Dec-1999.
  530. Kästner D and Thesing S (1999). Cache Aware Pre-Runtime Scheduling, Real-Time Systems, 17:2-3, (235-256), Online publication date: 14-Dec-1999.
  531. Lundqvist T and Stenström P (1999). An Integrated Path and Timing Analysis Method based on Cycle-Level Symbolic Execution, Real-Time Systems, 17:2-3, (183-207), Online publication date: 14-Dec-1999.
  532. ACM
    El-Kadi A (1999). Viewpoint: stop that divorce!, Communications of the ACM, 42:12, (27-28), Online publication date: 1-Dec-1999.
  533. Felty A and Stomp F (1999). Cache Coherency in SCI, Formal Aspects of Computing, 11:5, (475-497), Online publication date: 1-Dec-1999.
  534. Mitra T and Chiueh T Dynamic 3D graphics workload characterization and the architectural implications Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, (62-71)
  535. Panda P Memory bank customization and assignment in behavioral synthesis Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (477-481)
  536. Carloni L, McMillan K, Saldanha A and Sangiovanni-Vincentelli A A methodology for correct-by-construction latency insensitive design Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (309-315)
  537. Chung E, Benini L and De Micheli G Dynamic power management using adaptive learning tree Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (274-279)
  538. Grun P, Halambi A, Dutt N and Nicolau A RTGEN Proceedings of the 12th international symposium on System synthesis
  539. Stolte C, Bosch R, Hanrahan P and Rosenblum M Visualizing Application Behavior on Superscalar Processors Proceedings of the 1999 IEEE Symposium on Information Visualization
  540. Frigo M, Leiserson C, Prokop H and Ramachandran S Cache-Oblivious Algorithms Proceedings of the 40th Annual Symposium on Foundations of Computer Science
  541. Wu G and Chang Y (1999). Quasi-Universal Switch Matrices for FPD Design, IEEE Transactions on Computers, 48:10, (1107-1122), Online publication date: 1-Oct-1999.
  542. Fankhauser G, Stiller B and Plattner B (1999). Arrow, Netnomics, 1:2, (201-223), Online publication date: 14-Sep-1999.
  543. Ailamaki A, DeWitt D, Hill M and Wood D DBMSs on a Modern Processor Proceedings of the 25th International Conference on Very Large Data Bases, (266-277)
  544. ACM
    de la Fuente S, Clemente M and Cavanillas R (1999). Teaching computer architecture with a new superscalar processor emulator, ACM SIGCSE Bulletin, 31:3, (99-102), Online publication date: 1-Sep-1999.
  545. Kant K and Won Y (1999). Server Capacity Planning for Web Traffic Workload, IEEE Transactions on Knowledge and Data Engineering, 11:5, (731-747), Online publication date: 1-Sep-1999.
  546. ACM
    Benini L, Macii A, Macii E and Poncino M Selective instruction compression for memory energy reduction in embedded systems Proceedings of the 1999 international symposium on Low power electronics and design, (206-211)
  547. ACM
    Bellas N, Hajj I and Polychronopoulos C Using dynamic cache management techniques to reduce energy in a high-performance processor Proceedings of the 1999 international symposium on Low power electronics and design, (64-69)
  548. Chen C and Lin F (1999). An Easy-to-Use Approach for Practical Bus-Based System Design, IEEE Transactions on Computers, 48:8, (780-793), Online publication date: 1-Aug-1999.
  549. ACM
    Ghosh S, Martonosi M and Malik S (1999). Cache miss equations, ACM Transactions on Programming Languages and Systems, 21:4, (703-746), Online publication date: 1-Jul-1999.
  550. ACM
    Schneider J and Ferdinand C (1999). Pipeline behavior prediction for superscalar processors by abstract interpretation, ACM SIGPLAN Notices, 34:7, (35-44), Online publication date: 1-Jul-1999.
  551. ACM
    Uh G, Wang Y, Whalley D, Jinturkar S, Burns C and Cao V (1999). Effective exploitation of a zero overhead loop buffer, ACM SIGPLAN Notices, 34:7, (10-19), Online publication date: 1-Jul-1999.
  552. Giorgi R and Prete C (1999). PSCR, IEEE Transactions on Parallel and Distributed Systems, 10:7, (742-763), Online publication date: 1-Jul-1999.
  553. Sibai F (1999). Optimal Clustering of Hierarchical Hyper-Ring Multicomputers, The Journal of Supercomputing, 14:1, (53-76), Online publication date: 1-Jul-1999.
  554. ACM
    de la Fuente S, Clemente M and Cavanillas R Teaching computer architecture with a new superscalar processor emulator Proceedings of the 4th annual SIGCSE/SIGCUE ITiCSE conference on Innovation and technology in computer science education, (99-102)
  555. ACM
    Sánchez J and González A A locality sensitive multi-module cache with explicit management Proceedings of the 13th international conference on Supercomputing, (51-59)
  556. ACM
    Kin J, Lee C, Mangione-Smith W and Potkonjak M Power efficient mediaprocessors Proceedings of the 36th annual ACM/IEEE Design Automation Conference, (321-326)
  557. ACM
    Shiue W and Chakrabarti C Memory exploration for low power, embedded systems Proceedings of the 36th annual ACM/IEEE Design Automation Conference, (140-145)
  558. ACM
    Jeong J and Dubois M Optimal replacements in caches with two miss costs Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures, (155-164)
  559. ACM
    Mueller S On the scheduling of variable latency functional units Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures, (148-154)
  560. ACM
    Barve R, Shriver E, Gibbons P, Hillyer B, Matias Y and Vitter J (1999). Modeling and optimizing I/O throughput of multiple disks on a bus, ACM SIGMETRICS Performance Evaluation Review, 27:1, (83-92), Online publication date: 1-Jun-1999.
  561. Gajjala Purna K and Bhatia D (1999). Temporal Partitioning and Scheduling Data Flow Graphs for Reconfigurable Computers, IEEE Transactions on Computers, 48:6, (579-590), Online publication date: 1-Jun-1999.
  562. Kim S and Somani A Area efficient architectures for information integrity in cache memories Proceedings of the 26th annual international symposium on Computer architecture, (246-255)
  563. Cuppu V, Jacob B, Davis B and Mudge T A performance comparison of contemporary DRAM architectures Proceedings of the 26th annual international symposium on Computer architecture, (222-233)
  564. Shen X, Arvind and Rudolph L Commit-reconcile & fences (CRF) Proceedings of the 26th annual international symposium on Computer architecture, (150-161)
  565. ACM
    Schneider J and Ferdinand C Pipeline behavior prediction for superscalar processors by abstract interpretation Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems, (35-44)
  566. ACM
    Uh G, Wang Y, Whalley D, Jinturkar S, Burns C and Cao V Effective exploitation of a zero overhead loop buffer Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems, (10-19)
  567. ACM
    Kim S and Somani A (1999). Area efficient architectures for information integrity in cache memories, ACM SIGARCH Computer Architecture News, 27:2, (246-255), Online publication date: 1-May-1999.
  568. ACM
    Cuppu V, Jacob B, Davis B and Mudge T (1999). A performance comparison of contemporary DRAM architectures, ACM SIGARCH Computer Architecture News, 27:2, (222-233), Online publication date: 1-May-1999.
  569. ACM
    Shen X, Arvind and Rudolph L (1999). Commit-reconcile & fences (CRF), ACM SIGARCH Computer Architecture News, 27:2, (150-161), Online publication date: 1-May-1999.
  570. ACM
    Barve R, Gibbons P, Hillyer B, Matias Y, Shriver E and Vitter J Round-like behavior in multiple disks on a bus Proceedings of the sixth workshop on I/O in parallel and distributed systems, (1-9)
  571. ACM
    Barve R, Shriver E, Gibbons P, Hillyer B, Matias Y and Vitter J Modeling and optimizing I/O throughput of multiple disks on a bus Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, (83-92)
  572. Arvind and Shen X (1999). Using Term Rewriting Systems to Design and Verify Processors, IEEE Micro, 19:3, (36-46), Online publication date: 1-May-1999.
  573. Shirvani P and McCluskey E PADded Cache Proceedings of the 1999 17TH IEEE VLSI Test Symposium
  574. Batcher K and Papachristou C Instruction Randomization Self Test For Processor Cores Proceedings of the 1999 17TH IEEE VLSI Test Symposium
  575. Kastrup B, Bink A and Hoogerbrugge J ConCISe Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
  576. Teuscher C, Haenni J, Restrepo H, Sanchez E and Gomez F A Reconfigurable Platform for Academic Purposes Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
  577. Cadambi S and Goldstein S CPR Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
  578. ACM
    Mahapatra N and Venkatrao B (1999). The processor-memory bottleneck, XRDS: Crossroads, The ACM Magazine for Students, 5:3es, (2-es), Online publication date: 1-Apr-1999.
  579. ACM
    Clifton M Logical conditional instructions Proceedings of the 37th annual Southeast regional conference (CD-ROM), (24-es)
  580. Yan Y and Zhang X (1999). Profit-Effective Parallel Computing, IEEE Concurrency, 7:2, (65-69), Online publication date: 1-Apr-1999.
  581. ACM
    Lebeck A Cache conscious programming in undergraduate computer science The proceedings of the thirtieth SIGCSE technical symposium on Computer science education, (247-251)
  582. Childers B and Davidson J Architectural Considerations for Application-Specific Counterflow Pipelines Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
  583. ACM
    Lebeck A (1999). Cache conscious programming in undergraduate computer science, ACM SIGCSE Bulletin, 31:1, (247-251), Online publication date: 1-Mar-1999.
  584. ACM
    Johnstone M and Wilson P (1998). The memory fragmentation problem, ACM SIGPLAN Notices, 34:3, (26-36), Online publication date: 1-Mar-1999.
  585. ACM
    Fornaciari W, Sciuto D and Silvano C Power estimation for architectural exploration of HW/SW communication on system-level buses Proceedings of the seventh international workshop on Hardware/software codesign, (152-156)
  586. ACM
    Jacob J and Chow P Memory interfacing and instruction specification for reconfigurable processors Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays, (145-154)
  587. Topham N and González A (1999). Randomized Cache Placement for Eliminating Conflicts, IEEE Transactions on Computers, 48:2, (185-192), Online publication date: 1-Feb-1999.
  588. Kwak H, Lee B, Hurson A, Yoon S and Hahn W (1999). Effects of Multithreading on Cache Performance, IEEE Transactions on Computers, 48:2, (176-184), Online publication date: 1-Feb-1999.
  589. Temam O (1999). An Algorithm for Optimally Exploiting Spatial and Temporal Locality in Upper Memory Levels, IEEE Transactions on Computers, 48:2, (150-158), Online publication date: 1-Feb-1999.
  590. Liberatore V Empirical investigation of the Markov reference model Proceedings of the tenth annual ACM-SIAM symposium on Discrete algorithms, (653-662)
  591. Ladner R, Fix J and LaMarca A Cache performance analysis of traversals and random accesses Proceedings of the tenth annual ACM-SIAM symposium on Discrete algorithms, (613-622)
  592. ACM
    Weiß C, Karl W, Kowarschik M and Rüde U Memory characteristics of iterative methods Proceedings of the 1999 ACM/IEEE conference on Supercomputing, (31-es)
  593. ACM
    Zhang Z and Zhang X Cache-optimal methods for bit-reversals Proceedings of the 1999 ACM/IEEE conference on Supercomputing, (26-es)
  594. ACM
    Solihin Y, Lam V and Torrellas J Scal-Tool Proceedings of the 1999 ACM/IEEE conference on Supercomputing, (17-es)
  595. ACM
    Houzet D and Mzoughi A Computer architecture development courses in Toulouse Universities Proceedings of the 1999 workshop on Computer architecture education, (9-es)
  596. ACM
    Djordjevic J, Milenkovic A, Todorovic I and Marinov D CALKAS Proceedings of the 1999 workshop on Computer architecture education, (4-es)
  597. Okuma T, Tomiyama H, Inoue A, Fajar E and Yasuura H Instruction encoding techniques for area minimization of instruction ROM Proceedings of the 11th international symposium on System synthesis, (125-130)
  598. Siska C A processor desription language supporting retargetable multi-pipeline DSP program development tools Proceedings of the 11th international symposium on System synthesis, (31-36)
  599. ACM
    Ghosh S, Martonosi M and Malik S (1998). Precise miss analysis for program transformations with caches of arbitrary associativity, ACM SIGOPS Operating Systems Review, 32:5, (228-239), Online publication date: 1-Dec-1998.
  600. ACM
    Temam O (1998). Investigating optimal local memory performance, ACM SIGOPS Operating Systems Review, 32:5, (218-227), Online publication date: 1-Dec-1998.
  601. ACM
    Chen Y, Bilas A, Damianakis S, Dubnicki C and Li K (1998). UTLB, ACM SIGOPS Operating Systems Review, 32:5, (193-204), Online publication date: 1-Dec-1998.
  602. ACM
    Machanick P, Salverda P and Pompe L (1998). Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy, ACM SIGOPS Operating Systems Review, 32:5, (105-114), Online publication date: 1-Dec-1998.
  603. ACM
    Acharya A, Uysal M and Saltz J (1998). Active disks, ACM SIGOPS Operating Systems Review, 32:5, (81-91), Online publication date: 1-Dec-1998.
  604. ACM
    Wilmot D (1998). Data threaded microarchitecture, ACM SIGARCH Computer Architecture News, 26:5, (22-32), Online publication date: 1-Dec-1998.
  605. Driesen K and Hölzle U The cascaded predictor Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture, (249-258)
  606. Srinivasan S and Lebeck A Load latency tolerance in dynamically scheduled processors Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture, (148-159)
  607. Lee C and Stoodley M Simple vector microprocessors for multimedia applications Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture, (25-36)
  608. ACM
    Ghosh S, Martonosi M and Malik S (1998). Precise miss analysis for program transformations with caches of arbitrary associativity, ACM SIGPLAN Notices, 33:11, (228-239), Online publication date: 1-Nov-1998.
  609. ACM
    Temam O (1998). Investigating optimal local memory performance, ACM SIGPLAN Notices, 33:11, (218-227), Online publication date: 1-Nov-1998.
  610. ACM
    Chen Y, Bilas A, Damianakis S, Dubnicki C and Li K (1998). UTLB, ACM SIGPLAN Notices, 33:11, (193-204), Online publication date: 1-Nov-1998.
  611. ACM
    Machanick P, Salverda P and Pompe L (1998). Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy, ACM SIGPLAN Notices, 33:11, (105-114), Online publication date: 1-Nov-1998.
  612. ACM
    Acharya A, Uysal M and Saltz J (1998). Active disks, ACM SIGPLAN Notices, 33:11, (81-91), Online publication date: 1-Nov-1998.
  613. ACM
    Ho P, Isles A and Kam T Formal verification of pipeline control using controlled token nets and abstract interpretation Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, (529-536)
  614. ACM
    Li Y and Wolf W Hardware/software co-synthesis with memory hierarchies Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, (430-436)
  615. Kozyrakis C and Patterson D (1998). A New Direction for Computer Architecture Research, Computer, 31:11, (24-32), Online publication date: 1-Nov-1998.
  616. ACM
    Singh S, Woo M and Raghavendra C Power-aware routing in mobile ad hoc networks Proceedings of the 4th annual ACM/IEEE international conference on Mobile computing and networking, (181-190)
  617. ACM
    Ghosh S, Martonosi M and Malik S Precise miss analysis for program transformations with caches of arbitrary associativity Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (228-239)
  618. ACM
    Temam O Investigating optimal local memory performance Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (218-227)
  619. ACM
    Chen Y, Bilas A, Damianakis S, Dubnicki C and Li K UTLB Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (193-204)
  620. ACM
    Machanick P, Salverda P and Pompe L Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (105-114)
  621. ACM
    Acharya A, Uysal M and Saltz J Active disks Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (81-91)
  622. ACM
    Biswas P Issues in cache management algorithms for commercial software systems Proceedings of the 1st international workshop on Software and performance, (76-77)
  623. ACM
    Johnstone M and Wilson P The memory fragmentation problem Proceedings of the 1st international symposium on Memory management, (26-36)
  624. ACM
    Fiuczynski M, Martin R, Owa T and Bershad B SPINE Proceedings of the 8th ACM SIGOPS European workshop on Support for composing distributed applications, (7-12)
  625. Pflanz M and Vierhaus H (1998). Generating Reliable Embedded Processors, IEEE Micro, 18:5, (33-41), Online publication date: 1-Sep-1998.
  626. Montalvo L, Parhi K and Guyot A (1998). New Svoboda-Tung Division, IEEE Transactions on Computers, 47:9, (1014-1020), Online publication date: 1-Sep-1998.
  627. Tahar S and Kumar R (1998). A Practical Methodology for the Formal Verification of RISC Processors, Formal Methods in System Design, 13:2, (159-225), Online publication date: 1-Sep-1998.
  628. ACM
    Kol R and Ginosar R Kin Proceedings of the 12th international conference on Supercomputing, (433-440)
  629. Jacob B and Mudge T (1998). Virtual Memory in Contemporary Microprocessors, IEEE Micro, 18:4, (60-75), Online publication date: 1-Jul-1998.
  630. ACM
    Lee D, Crowley P, Baer J, Anderson T and Bershad B (1998). Execution characteristics of desktop applications on Windows NT, ACM SIGARCH Computer Architecture News, 26:3, (27-38), Online publication date: 1-Jun-1998.
  631. ACM
    Barve R, Shriver E, Gibbons P, Hillyer B, Matias Y and Vitter J (1998). Modeling and optimizing I/O throughput of multiple disks on a bus (summary), ACM SIGMETRICS Performance Evaluation Review, 26:1, (264-265), Online publication date: 1-Jun-1998.
  632. ACM
    Barve R, Shriver E, Gibbons P, Hillyer B, Matias Y and Vitter J Modeling and optimizing I/O throughput of multiple disks on a bus (summary) Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, (264-265)
  633. ACM
    Frigo M and Luchangco V Computation-centric memory models Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures, (240-249)
  634. ACM
    Vishkin U, Dascal S, Berkovich E and Nuzman J Explicit multi-threading (XMT) bridging models for instruction parallelism (extended abstract) Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures, (140-151)
  635. ACM
    Benitez D Learning the relationship between computer architecture and technology by reconfiguring Proceedings of the 1998 workshop on Computer architecture education, (30-es)
  636. ACM
    Pinkston T and Beerel P Computer engineering using innovative instructional technologies at the University of Southern California Proceedings of the 1998 workshop on Computer architecture education, (27-es)
  637. ACM
    Djordjevic J, Milenkovic A and Prodanovic S A hierarchical memory system environment Proceedings of the 1998 workshop on Computer architecture education, (23-es)
  638. ACM
    Stenström P and Dahlgren F A holistic approach to computer system design education based on system simulation techniques Proceedings of the 1998 workshop on Computer architecture education, (13-es)
  639. ACM
    López P and Duato J A lab course on computer architecture Proceedings of the 1998 workshop on Computer architecture education, (11-es)
  640. ACM
    Pastor E, Sánchez F and del Corral A A rudimentary machine Proceedings of the 1998 workshop on Computer architecture education, (7-es)
  641. Lee C, Hahn J, Seo Y, Min S, Ha R, Hong S, Park C, Lee M and Kim C (1998). Analysis of Cache-Related Preemption Delay in Fixed-Priority Preemptive Scheduling, IEEE Transactions on Computers, 47:6, (700-713), Online publication date: 1-Jun-1998.
  642. Vaidya N (1998). A Case for Two-Level Recovery Schemes, IEEE Transactions on Computers, 47:6, (656-666), Online publication date: 1-Jun-1998.
  643. ACM
    Diwan A, McKinley K and Moss J (1998). Type-based alias analysis, ACM SIGPLAN Notices, 33:5, (106-117), Online publication date: 1-May-1998.
  644. ACM
    Diwan A, McKinley K and Moss J Type-based alias analysis Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation, (106-117)
  645. ACM
    Murgai R, Fujita M and Oliveira A Using complementation and resequencing to minimize transitions Proceedings of the 35th annual Design Automation Conference, (694-697)
  646. ACM
    Olukotun K, Heinrich M and Ofelt D Digital system simulation Proceedings of the 35th annual Design Automation Conference, (658-663)
  647. ACM
    McGraw R, Aylor J and Klenke R A top-down design environment for developing pipelined datapaths Proceedings of the 35th annual Design Automation Conference, (236-241)
  648. Lee D, Crowley P, Baer J, Anderson T and Bershad B Execution characteristics of desktop applications on Windows NT Proceedings of the 25th annual international symposium on Computer architecture, (27-38)
  649. ACM
    Clifton M A comparison of space requirements for short-circuit and full evaluation of Boolean expressions Proceedings of the 36th annual Southeast regional conference, (261-267)
  650. Ernst R (1998). Codesign of Embedded Systems, IEEE Design & Test, 15:2, (45-54), Online publication date: 1-Apr-1998.
  651. ACM
    Munsil W and Wang C (1998). Reducing stack usage in Java bytecode execution, ACM SIGARCH Computer Architecture News, 26:1, (7-11), Online publication date: 1-Mar-1998.
  652. Dunning D, Regnier G, McAlpine G, Cameron D, Shubert B, Berry F, Merritt A, Gronke E and Dodd C (1998). The Virtual Interface Architecture, IEEE Micro, 18:2, (66-76), Online publication date: 1-Mar-1998.
  653. ACM
    Sibai F Performance of the hyper-ring multicomputer Proceedings of the 1998 ACM symposium on Applied Computing, (598-606)
  654. Salapura V and Gschwind M Hardware/software co-design of a fuzzy RISC processor Proceedings of the conference on Design, automation and test in Europe, (875-882)
  655. Benini L, De Micheli G, Macii E, Sciuto D and Silvano C Address bus encoding techniques for system-level power optimization Proceedings of the conference on Design, automation and test in Europe, (861-867)
  656. Tomiyama H, Ishihara T, Inoue A and Yasuura H Instruction scheduling for power reduction in processor-based system design Proceedings of the conference on Design, automation and test in Europe, (855-860)
  657. Zhao W and Papachristou C Testing DSP cores based on self-test programs Proceedings of the conference on Design, automation and test in Europe, (166-172)
  658. Bodlaender H, Gustedt J and Telle J Linear-time register allocation for a fixed number of registers Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms, (574-583)
  659. Farach M and Liberatore V On local register allocation Proceedings of the ninth annual ACM-SIAM symposium on Discrete algorithms, (564-573)
  660. Charlesworth A (1998). Starfire, IEEE Micro, 18:1, (39-49), Online publication date: 1-Jan-1998.
  661. Gabbay F and Mendelson A Can program profiling support value prediction? Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, (270-280)
  662. Chen C and Wu A Microarchitecture support for improving the performance of load target prediction Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, (228-234)
  663. Lee C and DeVries D Initial results on the performance and cost of vector microprocessors Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, (171-182)
  664. Panda D, Basak D, Dai D, Kesavan R, Sivaram R, Banikazemi M and Moorthy V Simulation of modern parallel systems Proceedings of the 29th conference on Winter simulation, (1013-1020)
  665. ACM
    Hristea C, Lenoski D and Keen J Measuring memory hierarchy performance of cache-coherent multiprocessors using micro benchmarks Proceedings of the 1997 ACM/IEEE conference on Supercomputing, (1-12)
  666. ACM
    Charlesworth A, Aneshansley N, Haakmeester M, Drogichen D, Gilbert G, Williams R and Phelps A The Starfire SMP interconnect Proceedings of the 1997 ACM/IEEE conference on Supercomputing, (1-20)
  667. Levitt J and Olukotun K Verifying correct pipeline implementation for microprocessors Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, (162-169)
  668. Mitra S, Avra L and McCluskey E SCAN SYNTHESIS FOR ONE-HOT SIGNALS Proceedings of the 1997 IEEE International Test Conference
  669. Fagin B (1997). Partial Resolution in Branch Target Buffers, IEEE Transactions on Computers, 46:10, (1142-1145), Online publication date: 1-Oct-1997.
  670. Olukotun K, Mudge T and Brown R (1997). Multilevel Optimization of Pipelined Caches, IEEE Transactions on Computers, 46:10, (1093-1102), Online publication date: 1-Oct-1997.
  671. Kozyrakis C, Perissakis S, Patterson D, Anderson T, Asanovic K, Cardwell N, Fromm R, Golbus J, Gribstad B, Keeton K, Thomas R, Treuhaft N and Yelick K (1997). Scalable Processors in the Billion-Transistor Era, Computer, 30:9, (75-78), Online publication date: 1-Sep-1997.
  672. Manjikia N Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors Proceedings of the international Conference on Parallel Processing
  673. ACM
    Azam M, Franzon P and Liu W Low power data processing by elimination of redundant computations Proceedings of the 1997 international symposium on Low power electronics and design, (259-264)
  674. ACM
    Kalambur A and Irwin M An extended addressing mode for low power Proceedings of the 1997 international symposium on Low power electronics and design, (208-213)
  675. ACM
    Musoll E, Lang T and Cortadella J Exploiting the locality of memory references to reduce the address bus energy Proceedings of the 1997 international symposium on Low power electronics and design, (202-207)
  676. ACM
    Benini L, De Micheli G, Macii E, Poncino M and Quer S System-level power optimization of special purpose applications Proceedings of the 1997 international symposium on Low power electronics and design, (24-29)
  677. Kienhuis B, Deprettere E, Vissers K and van der Wolf P An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
  678. ACM
    González J and González A Speculative execution via address prediction and data prefetching Proceedings of the 11th international conference on Supercomputing, (196-203)
  679. ACM
    Juan T, Navarro J and Temam O Data caches for superscalar processors Proceedings of the 11th international conference on Supercomputing, (60-67)
  680. ACM
    Moreno J and Moudgil M Scalable instruction-level parallelism through tree-instructions Proceedings of the 11th international conference on Supercomputing, (1-11)
  681. ACM
    Cleary J, McWha J and Pearson M (1997). Timestamp representations for virtual sequences, ACM SIGSIM Simulation Digest, 27:1, (98-105), Online publication date: 1-Jul-1997.
  682. Flynn D (1997). AMBA, IEEE Micro, 17:4, (20-27), Online publication date: 1-Jul-1997.
  683. ACM
    Manne S, Grunwald D and Somenzi F Remembrance of things past Proceedings of the 34th annual Design Automation Conference, (196-201)
  684. ACM
    Malik S, Martonosi M and Li Y Static timing analysis of embedded software Proceedings of the 34th annual Design Automation Conference, (147-152)
  685. Cleary J, McWha J and Pearson M Timestamp representations for virtual sequences Proceedings of the eleventh workshop on Parallel and distributed simulation, (98-105)
  686. ACM
    Fromm R, Perissakis S, Cardwell N, Kozyrakis C, McGaughy B, Patterson D, Anderson T and Yelick K The energy efficiency of IRAM architectures Proceedings of the 24th annual international symposium on Computer architecture, (327-337)
  687. ACM
    Wilson K and Olukotun K Designing high bandwidth on-chip caches Proceedings of the 24th annual international symposium on Computer architecture, (121-132)
  688. ACM
    Nahum E, Yates D, Kurose J and Towsley D (1997). Cache behavior of network protocols, ACM SIGMETRICS Performance Evaluation Review, 25:1, (169-180), Online publication date: 1-Jun-1997.
  689. ACM
    Nahum E, Yates D, Kurose J and Towsley D Cache behavior of network protocols Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, (169-180)
  690. ACM
    Vishkin U From algorithm parallelism to instruction-level parallelism Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures, (260-271)
  691. ACM
    O'Neil P and Quass D (1997). Improved query performance with variant indexes, ACM SIGMOD Record, 26:2, (38-49), Online publication date: 1-Jun-1997.
  692. ACM
    O'Neil P and Quass D Improved query performance with variant indexes Proceedings of the 1997 ACM SIGMOD international conference on Management of data, (38-49)
  693. Bosselaers A, Govaerts R and Vandewalle J SHA Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques, (348-362)
  694. ACM
    Fromm R, Perissakis S, Cardwell N, Kozyrakis C, McGaughy B, Patterson D, Anderson T and Yelick K (1997). The energy efficiency of IRAM architectures, ACM SIGARCH Computer Architecture News, 25:2, (327-337), Online publication date: 1-May-1997.
  695. ACM
    Wilson K and Olukotun K (1997). Designing high bandwidth on-chip caches, ACM SIGARCH Computer Architecture News, 25:2, (121-132), Online publication date: 1-May-1997.
  696. Rim K, Min B and Shin S (1997). An Architecture for High Availability Multi-user Systems, Computer Communications, 20:3, (197-205), Online publication date: 1-May-1997.
  697. Brustoloni J and Steenkiste P Copy Emulation in Checksummed, Multiple-Packet Communication Proceedings of the INFOCOM '97. Sixteenth Annual Joint Conference of the IEEE Computer and Communications Societies. Driving the Information Revolution
  698. Mueller S and Vishkin U Conflict-Free Access to Multiple Single-Ported Register Files Proceedings of the 11th International Symposium on Parallel Processing, (672-678)
  699. Wilken K and Kong T (1997). Concurrent Detection of Software and Hardware Data-Access Faults, IEEE Transactions on Computers, 46:4, (412-424), Online publication date: 1-Apr-1997.
  700. Herrmann D and Ernst R Register Synthesis for Speculative Computation Proceedings of the 1997 European conference on Design and Test
  701. Hertwig A and Wunderlich H Fast Controllers for Data Dominated Applications Proceedings of the 1997 European conference on Design and Test
  702. Sasaki T Memory Hierarchy Design for Jetpipeline Proceedings of the 2nd AIZU International Symposium on Parallel Algorithms / Architecture Synthesis
  703. ACM
    Weicker R (1997). On the use of SPEC benchmarks in computer architecture research, ACM SIGARCH Computer Architecture News, 25:1, (19-22), Online publication date: 1-Mar-1997.
  704. ACM
    Lam N, Chang S and Manwaring M Evaluating the performance of dynamic branch prediction schemes with BPSim Proceedings of the 1997 workshop on Computer architecture education, (9-es)
  705. ACM
    Zhang Y and Adams G An interactive, visual simulator for the DLX pipeline Proceedings of the 1997 workshop on Computer architecture education, (2-es)
  706. Schnarr E and Larus J Instruction scheduling and executable editing Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, (288-297)
  707. ACM
    Peir J, Hsu W, Young H and Ong S (1996). Improving cache performance with balanced tag and data paths, ACM SIGOPS Operating Systems Review, 30:5, (268-278), Online publication date: 1-Dec-1996.
  708. ACM
    Saghir M, Chow P and Lee C (1996). Exploiting dual data-memory banks in digital signal processors, ACM SIGOPS Operating Systems Review, 30:5, (234-243), Online publication date: 1-Dec-1996.
  709. ACM
    McKinley K and Temam O (1996). A quantitative analysis of loop nest locality, ACM SIGOPS Operating Systems Review, 30:5, (94-104), Online publication date: 1-Dec-1996.
  710. ACM
    Olukotun K, Nayfeh B, Hammond L, Wilson K and Chang K (1996). The case for a single-chip multiprocessor, ACM SIGOPS Operating Systems Review, 30:5, (2-11), Online publication date: 1-Dec-1996.
  711. ACM
    Machanick P (1996). The case for SRAM main memory, ACM SIGARCH Computer Architecture News, 24:5, (23-30), Online publication date: 1-Dec-1996.
  712. ACM
    Mudge T (1996). Strategic directions in computer architecture, ACM Computing Surveys, 28:4, (671-678), Online publication date: 1-Dec-1996.
  713. Miguel J, Arruabarrena A, Beivide R and Gregorio J (1996). Assessing the Performance of the New IBM SP2 Communication Subsystem, IEEE Parallel & Distributed Technology: Systems & Technology, 4:4, (12-22), Online publication date: 1-Dec-1996.
  714. Snell Q and Gustafson J An analytical model of the HINT performance metric Proceedings of the 1996 ACM/IEEE conference on Supercomputing, (19-es)
  715. Tomiyama H and Yasuura H Size-Constrained Code Placement for Cache Miss Rate Reduction Proceedings of the 9th international symposium on System synthesis
  716. ACM
    Finn G, Hotz S and Van Meter R (1996). The impact of a zero-scan Internet checksumming mechanism, ACM SIGCOMM Computer Communication Review, 26:5, (27-39), Online publication date: 1-Oct-1996.
  717. ACM
    Peir J, Hsu W, Young H and Ong S Improving cache performance with balanced tag and data paths Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, (268-278)
  718. ACM
    Saghir M, Chow P and Lee C Exploiting dual data-memory banks in digital signal processors Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, (234-243)
  719. ACM
    McKinley K and Temam O A quantitative analysis of loop nest locality Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, (94-104)
  720. ACM
    Olukotun K, Nayfeh B, Hammond L, Wilson K and Chang K The case for a single-chip multiprocessor Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, (2-11)
  721. ACM
    Driesen K and Hölzle U (1996). The direct cost of virtual function calls in C++, ACM SIGPLAN Notices, 31:10, (306-323), Online publication date: 1-Oct-1996.
  722. ACM
    Driesen K and Hölzle U The direct cost of virtual function calls in C++ Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications, (306-323)
  723. ACM
    Peir J, Hsu W, Young H and Ong S (1996). Improving cache performance with balanced tag and data paths, ACM SIGPLAN Notices, 31:9, (268-278), Online publication date: 1-Sep-1996.
  724. ACM
    Saghir M, Chow P and Lee C (1996). Exploiting dual data-memory banks in digital signal processors, ACM SIGPLAN Notices, 31:9, (234-243), Online publication date: 1-Sep-1996.
  725. ACM
    McKinley K and Temam O (1996). A quantitative analysis of loop nest locality, ACM SIGPLAN Notices, 31:9, (94-104), Online publication date: 1-Sep-1996.
  726. ACM
    Olukotun K, Nayfeh B, Hammond L, Wilson K and Chang K (1996). The case for a single-chip multiprocessor, ACM SIGPLAN Notices, 31:9, (2-11), Online publication date: 1-Sep-1996.
  727. ACM
    Belayneh S and Kaeli D (1996). A discussion on non-blocking/lockup-free caches, ACM SIGARCH Computer Architecture News, 24:4, (16), Online publication date: 1-Sep-1996.
  728. ACM
    Gómez Pulido J, Sánchez Pérez J and Moreno Zamora J (1996). An educational tool for testing hierarchical multilevel caches, ACM SIGARCH Computer Architecture News, 24:4, (11-15), Online publication date: 1-Sep-1996.
  729. ACM
    Vishkin U (1996). Can parallel algorithms enhance serial implementation?, Communications of the ACM, 39:9, (88-91), Online publication date: 1-Sep-1996.
  730. Ko U, Hill A and Balsara P Design techniques for high performance, energy efficient control logic Proceedings of the 1996 international symposium on Low power electronics and design, (97-100)
  731. ACM
    Abdullah M (1996). hcc—a portable ANSI C compiler (with a code generator for the PowerPCs), ACM SIGPLAN Notices, 31:8, (52-59), Online publication date: 1-Aug-1996.
  732. ACM
    Levitt J and Olukotun K A scalable formal verification methodology for pipelined microprocessors Proceedings of the 33rd annual Design Automation Conference, (558-563)
  733. ACM
    Nayfeh B, Hammond L and Olukotun K Evaluation of design alternatives for a multiprocessor microprocessor Proceedings of the 23rd annual international symposium on Computer architecture, (67-77)
  734. ACM
    Sechrest S, Lee C and Mudge T Correlation and aliasing in dynamic branch predictors Proceedings of the 23rd annual international symposium on Computer architecture, (22-32)
  735. ACM
    Nayfeh B, Hammond L and Olukotun K (1996). Evaluation of design alternatives for a multiprocessor microprocessor, ACM SIGARCH Computer Architecture News, 24:2, (67-77), Online publication date: 1-May-1996.
  736. ACM
    Sechrest S, Lee C and Mudge T (1996). Correlation and aliasing in dynamic branch predictors, ACM SIGARCH Computer Architecture News, 24:2, (22-32), Online publication date: 1-May-1996.
  737. Yang Y A Class of Interconnection Networks for Multicasting Proceedings of the 10th International Parallel Processing Symposium, (796-802)
  738. Sampogna A, Kaeli D, Green D, Silva M and Sniezek C Performance Modeling Using Object-Oriented Execution-Driven Simulation} Proceedings of the 29th Annual Simulation Symposium (SS '96)
  739. ACM
    Kwon O, Park G and Han T (1996). A compiler optimization to reduce execution time of loop nest, ACM SIGARCH Computer Architecture News, 24:1, (6-11), Online publication date: 1-Mar-1996.
  740. McMahon S The capture, characterization, and performance analysis of Macintosh traces Proceedings of the 41st IEEE International Computer Conference
  741. McVoy L and Staelin C lmbench Proceedings of the 1996 annual conference on USENIX Annual Technical Conference, (23-23)
  742. ACM
    Harrison L Examination of a memory access classification scheme for pointer-intensive and numeric programs Proceedings of the 10th international conference on Supercomputing, (133-140)
  743. ACM
    Li Y and Chu W Using FPGA for computer architecture/organization education Proceedings of the 1996 workshop on Computer architecture education, (5-es)
  744. ACM
    Torrellas J Computer architecture education at the University of Illinois Proceedings of the 1996 workshop on Computer architecture education, (2-es)
  745. Hammami O Real time aspects of cluster based caches Proceedings of the 2nd International Workshop on Real-Time Computing Systems and Applications
  746. ACM
    Afzal T (1995). Performance modeling using the Motorola PowerPC timing simulator, ACM SIGARCH Computer Architecture News, 23:4, (9-18), Online publication date: 1-Sep-1995.
  747. ACM
    Phalke V A time invariant working set model for independent reference Proceedings of the 33rd annual on Southeast regional conference, (156-164)
  748. ACM
    Severson A and Nelson B (1995). Throughput in a counterflow pipeline processor, ACM SIGARCH Computer Architecture News, 23:1, (5-12), Online publication date: 1-Mar-1995.
  749. Mogul J, Bartlett J, Mayo R and Srivastava A Performance implications of multiple pointer sizes Proceedings of the USENIX 1995 Technical Conference Proceedings, (16-16)
  750. ACM
    Kaeli D Combining object-oriented design and computer architecture into a single senior-level course Proceedings of the 1995 workshop on Computer architecture education, (11-es)
  751. ACM
    Varma A, Kalampoukas L, Stiliadis D and Jacobson Q CPU design kit Proceedings of the 1995 workshop on Computer architecture education, (1-es)
  752. ACM
    Kurlander S and Fischer C Zero-cost range splitting Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation, (257-265)
  753. Mogul J A better update policy Proceedings of the USENIX Summer 1994 Technical Conference on USENIX Summer 1994 Technical Conference - Volume 1, (7-7)
  754. ACM
    Kurlander S and Fischer C (1994). Zero-cost range splitting, ACM SIGPLAN Notices, 29:6, (257-265), Online publication date: 1-Jun-1994.
  755. Quong R Expected I-cache miss rates via the gap model Proceedings of the 21st annual international symposium on Computer architecture, (372-383)
  756. ACM
    Rodriguez B A minimal TTL processor for architecture exploration Proceedings of the 1994 ACM symposium on Applied computing, (338-340)
  757. ACM
    Quong R (1994). Expected I-cache miss rates via the gap model, ACM SIGARCH Computer Architecture News, 22:2, (372-383), Online publication date: 1-Apr-1994.
  758. Ar S and Cai J Reliable benchmarks using numerical instability Proceedings of the fifth annual ACM-SIAM symposium on Discrete algorithms, (34-43)
  759. Chen J Memory behavior of an X11 window system Proceedings of the USENIX Winter 1994 Technical Conference on USENIX Winter 1994 Technical Conference, (16-16)
  760. ACM
    Chen J and Bershad B The impact of operating system structure on memory system performance Proceedings of the fourteenth ACM symposium on Operating systems principles, (120-133)
  761. Diep T, Shen J and Phillip M EXPLORER Proceedings of the 26th annual international symposium on Microarchitecture, (225-235)
  762. ACM
    Chen J and Bershad B (1993). The impact of operating system structure on memory system performance, ACM SIGOPS Operating Systems Review, 27:5, (120-133), Online publication date: 1-Dec-1993.
  763. ACM
    Hill M, Larus J, Lebeck A, Talluri M and Wood D (1993). Wisconsin Architectural Research Tool Set, ACM SIGARCH Computer Architecture News, 21:4, (8-10), Online publication date: 1-Sep-1993.
  764. ACM
    Kerns D and Eggers S Balanced scheduling Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation, (278-289)
  765. ACM
    Kerns D and Eggers S (1993). Balanced scheduling, ACM SIGPLAN Notices, 28:6, (278-289), Online publication date: 1-Jun-1993.
  766. ACM
    Bunda J, Fussell D, Athas W and Jenevein R 16-bit vs. 32-bit instructions for pipelined microprocessors Proceedings of the 20th annual international symposium on computer architecture, (237-246)
  767. ACM
    Bunda J, Fussell D, Athas W and Jenevein R (1993). 16-bit vs. 32-bit instructions for pipelined microprocessors, ACM SIGARCH Computer Architecture News, 21:2, (237-246), Online publication date: 1-May-1993.
Contributors
  • Stanford University
  • University of California, Berkeley

Recommendations

James Van Speybroeck

This massive and highly detailed work on computer systems and analysis reminds me in some ways of the calculus texts of Apostol and Olmstead. The second edition contains changes demanded by the evolution of the field, but also some conceptual changes. Chapter 1 discusses the fundamentals of computer design. Chapter 2 explains instruction set principles and examples. Chapters 3 and 4 are highly detailed and elegant descriptions of pipelining. Chapter 5 provides a standard but thorough treatment of memory hierarchy design. Chapter 6 covers all aspects of storage systems. Chapter 7 is concerned with interconnection networks. The text concludes with a chapter on multiprocessors. An interesting feature of every chapter is a section titled “Putting It All Together.” These sections usually encapsulate much of the material in an example of legitimate interest to professionals. Five appendices form a “text within the text.” The first appendix is a 72-page mini-text on computer arithmetic by David Goldberg. Appendix B covers vector processors. Appendix C is a survey of RISC architectures (a wise choice for inclusion). Appendix D explores the alternative to RISC, namely, the Intel 80x86. Finally, Appendix E examines protocol implementation issues. The exercises are magnificent. They require a blend of discipline and creativity on the part of the reader. This book is everything a sequel should be.

Access critical reviews of Computing literature here

Become a reviewer for Computing Reviews.