Carlo H. Séquin
- 1.D.A. Patterson and C.H. S~quin, "A VLSI RISC,~' Com- Google Scholar
Digital Library
- 2.M.G.H. Katevcnis, Reduced Instruction Set Computer Architectures for VLSI~ MIT Press, 1984. Google ScholarDigital Library
- 3.D. Ungat, R. Blau, P. Foley, D. Sample~, and D. Patterson, "Architecture of SOAR: Smailtalk on a RISC," Pros. 11th Syrup. on Computer Architecture, Ann Arbor, MI, June 1984. Google ScholarDigital Library
- 4.W.S. Scott , R.N. Mayo, G. Hamachi, and J.K. Ousterhout, "1986 VLSI Tools," CS Division Report No. UCB/CSD 86/272, University of California, Berkeley, CA, 1985.Google Scholar
- 5.D. Harrison, P. Moore, A.R. Newton, A.L. Sangiovanni- Vincentelli, and C.H. S~quin, "Data Management in the Berkeley Design Environment," submitted to ICCAD-86, Santa Clara, CA, Nov. 1986.Google Scholar
- 6.M.D. Hill, S.J. Eggers, J.R. Larus, G.S. Taylor, G. Adams, B.K. Bose, G.A. Gibson, P.M. Hansen, J. Keller, S.I. Kong, C.G. Lee, D. Lee, J.M. Pendleton, S.A. Ritchie, D.A. Wood, B.G. Zorn, P.N. Hilfinger, D.A. Hodges, R.H. Katz, J.K. Ousterhout, and D.A. Patterson, "SPUR: A VLSI Multiprocessor Workstation," CS Division Report No. UCB/CSD 86/273, University of California, Berkeley, CA, 1986. Google ScholarDigital Library
- 7.R. Brayton, A. Cagnola, E. Detjens, K. Eberhard, S. Krishna , P. McGeer, L.F. Peg, N. Phillips, R. Rudell, R. Segal, A. Wang, R. Yung, T. Villa, A.R. Newton, A.L. Sangiovanni-Vincentelli, and C.H. S~quin, "Multiple-Level Logic Optimization System," submitted to ICCAD-86, Santa Clara, CA, Nov.1986.Google Scholar
- 8.G. Adams, S. Devadas, K. Eberhard, C. Kring, F. Obermeier, P.S. Tzeng, A.R. Newton, A.L. Sangiovanni- Vincentelli, and C.H. S4quin, "Module Generation Systems," submitted to ICCAD-86, Santa Clara, CA, Nov. 1986.Google Scholar
- 9.C.H. S~quin, "Design and Layout Generation at the Symbolic Level," in Proceedings of the Summer School on VLS{ Tools and Applications, ed. W. Fichtner and M. Morf, Kluwer Acadmic Publishers, 1986.Google Scholar
- 10.T. Uehara and W.M. VanCleemput, "Optimal Layout of CMOS Functional Arrays," Trans. Uomp., vol. C-30, no. 5, 1981.Google Scholar
- 11.J.L. Barns, T. Laidig, B. Lin, H. Shin, P.S. Tzeng, A.R. Newton, A.L. Sangiovanni-Vincentelli, and C.H. S4quin, "Symbolic Design Using the Berkeley Design Environment,'' submitted to ICCAD-86, Santa Clara, CA, Nov. 1986.Google Scholar
- 12.H. Shin and C.H. S,~quin, "Two-Dimensional Compaction by Zone Refining," Proc. Design Autom. Conf., Paper 7.8, Las Vegas, July 1986. Google ScholarDigital Library
- 13.J. Burns, A. Casotto, G. Cheng, W. Dai, M. Igusa, M. Kubota, U. Lauther, F. Matron, F. Romeo, C. Sechen, H. Shin, G. Srinath, H. Yaghutiel, A.R. Newton, A.L. Sangiovanni-Vincentelli, and C.H. Stquin, "MOSAICS: An Integrated Macrocell Layout System," submitted to ICCAD-86, Santa Clara, CA, Nov. 1986.Google Scholar
- 14.C. See hen and A. Sangiovanni-Vincente!li, "TIM- BERWOLF 3.2: A New Standard Cell Placement and Global Routing Package," Proc. Design Aurora. Conj., Paper ~6.1, Las Vegas, July 1986. Google ScholarDigital Library
- 15.A. Sangiovanni-Vincentelli, D. Braun, J. Burns, S. Devades, H.K. Ms, K. Mayaram, and F. Romeo, "CHAMELEON: A New Multi-Layer Channel Router," Proc. Design Aurora. Conf., Paper ~8.j, Las Vegas, July 1986. Google ScholarDigital Library
- 16.H. Shin and A. Sangiovanni-Vincente!!i, "MIGHTY: A 'Rip-up and Reroute' Detailed Router," submitted to ICCAD-86, Santa Clara, CA, Nov. 1986.Google Scholar
- 17.R. Brayton, E. Detjens, S. Krishna , B. Lin, H.K. Ma, F. Obermeier, T. Quarles, L.F. Peg, R. Spiekelmier, J. Tam, A. Wang, D. Webber, R.S. Wei, N. Weiner, A.R. Newton, A.L. Sangi~vanni'Vincentelli' and C.H. S4quin, "Simulation, Timing Analysis, Verification and Testing in the Berkeley Synthesis Project," submitted to ICCAD-8$, Santa Clara, CA, Nov. 1986.Google Scholar
- 18.E.B. Eichelberger and T.W. Williams, "A Logic Design Structure for LSI Testability," ,four. Design Automation and Fault-Tolerant Computing, vol. 2, pp. 165-178, May 1978.Google Scholar
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- Highlight of VLSI at research Berkeley
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