In the fall of 1977 the Institute of Electrical and Electronics Engineers commissioned working group 754 to draft a standard for binary floating-point arithmetic. It was intended to prevent the proliferation of disparate arithmetics in the new microprocessor industry. At that time there were so many different flavors of arithmetic available on mainframes and minicomputers that the cost of reconciling their differences in numerical software had become, and remains, staggering. Now, more than five years later, draft 10.0 of the proposed standard has been voted out of the working group for IEEE approval.This thesis consists of a set of "footnotes" to the proposed standard. The first of them, an implementation guide published in January 1980, served as a working draft of the standard for over a year. The remaining chapters unfolded as the proposed standard did. They include an analysis of gradual underflow, the most controversial feature of the standard; an exhaustive discussion of radix conversion, which has been specified in the proposed standard only up to a worst-case error bound; and a revised version of the arithmetic test suite which has been available in machine-readable form from the working group.
Cited By
- Andrysco M, Jhala R and Lerner S (2016). Printing floating-point numbers: a faster, always correct method, ACM SIGPLAN Notices, 51:1, (555-567), Online publication date: 8-Apr-2016.
- Andrysco M, Jhala R and Lerner S Printing floating-point numbers: a faster, always correct method Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, (555-567)
- Langhammer M and Pasca B Floating-Point DSP Block Architecture for FPGAs Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, (117-125)
- Parks M (2000). Number-Theoretic Test Generation for Directed Rounding, IEEE Transactions on Computers, 49:7, (651-658), Online publication date: 1-Jul-2000.
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