A portable machine-independent global optimizer--design and measurements
- Author:
- Frederick Chi-Tak Chow
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Abstract
This dissertation addresses the topic of portable and machine-independent program optimization on a standard, well-defined intermediate code. The design of the intermediate code, and features needed to support machine-independent optimization are discussed. A number of new techniques in program optimization are presented. These techniques when applied can substantially reduce both the implementation complexities and running time of optimizers in general, with no sacrifice in the optimizations performed. A register allocation algorithm based on node coloring, suitable for use in the machine-independent context, is introduced. An implementation of these techniques in the machine-independent optimizer UOPT is presented. The optimization performance, efficiency and the relative importance among the different types of optimization transformations are studied according to timing measurements, optimization statistics and by variation in optimization parameters. Finally, the effectiveness of portable machine-independent optimization on a number of target machines that support the intermediate code is discussed, based on optimization performance data in the different machines and comparisons of machine characteristics. The overall evaluation confirms the advantages of using portable machine-independent optimization in a retargetable compiler system.
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Ardö H, Bolz C and FijaBkowski M (2012). Loop-aware optimizations in PyPy's tracing JIT, ACM SIGPLAN Notices, 48:2, (63-72), Online publication date: 23-Jan-2013.- Ardö H, Bolz C and FijaBkowski M Loop-aware optimizations in PyPy's tracing JIT Proceedings of the 8th symposium on Dynamic languages, (63-72)
- Knoop J, Rüthing O and Steffen B (2004). Lazy code motion, ACM SIGPLAN Notices, 39:4, (460-472), Online publication date: 1-Apr-2004.
- Briggs P, Cooper K, Kennedy K and Torczon L (2004). Coloring heuristics for register allocation, ACM SIGPLAN Notices, 39:4, (283-294), Online publication date: 1-Apr-2004.
- Wall D (2004). Global register allocation at link time, ACM SIGPLAN Notices, 39:4, (192-204), Online publication date: 1-Apr-2004.
- Chow F and Hennessy J (2004). Register allocation by priority-based coloring, ACM SIGPLAN Notices, 39:4, (91-103), Online publication date: 1-Apr-2004.
- Cai Q and Xue J Optimal and efficient speculation-based partial redundancy elimination Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, (91-102)
- Parameswaran S, Henkel J and Lekastas H Multi-parametric improvements for embedded systems using code-placement and address bus coding Proceedings of the 2003 Asia and South Pacific Design Automation Conference, (15-21)
- Parameswaran S and Henkel J I-CoPES Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, (635-641)
- Khedker U and Dhamdhere D (2019). Bidirectional data flow analysis, ACM SIGPLAN Notices, 34:6, (47-57), Online publication date: 1-Jun-1999.
- Adl-Tabatabai A, Cierniak M, Lueh G, Parikh V and Stichnoth J (1998). Fast, effective code generation in a just-in-time Java compiler, ACM SIGPLAN Notices, 33:5, (280-290), Online publication date: 1-May-1998.
- Xi H and Pfenning F (1998). Eliminating array bound checking through dependent types, ACM SIGPLAN Notices, 33:5, (249-257), Online publication date: 1-May-1998.
- Lo R, Chow F, Kennedy R, Liu S and Tu P (1998). Register promotion by sparse partial redundancy elimination of loads and stores, ACM SIGPLAN Notices, 33:5, (26-37), Online publication date: 1-May-1998.
- Adl-Tabatabai A, Cierniak M, Lueh G, Parikh V and Stichnoth J Fast, effective code generation in a just-in-time Java compiler Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation, (280-290)
- Xi H and Pfenning F Eliminating array bound checking through dependent types Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation, (249-257)
- Lo R, Chow F, Kennedy R, Liu S and Tu P Register promotion by sparse partial redundancy elimination of loads and stores Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation, (26-37)
- Chow F, Chan S, Kennedy R, Liu S, Lo R and Tu P (1997). A new algorithm for partial redundancy elimination based on SSA form, ACM SIGPLAN Notices, 32:5, (273-286), Online publication date: 1-May-1997.
- Chow F, Chan S, Kennedy R, Liu S, Lo R and Tu P A new algorithm for partial redundancy elimination based on SSA form Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation, (273-286)
- Adl-Tabatabai A, Gross T and Lueh G (1996). Code reuse in an optimizing compiler, ACM SIGPLAN Notices, 31:10, (51-68), Online publication date: 1-Oct-1996.
- Adl-Tabatabai A, Gross T and Lueh G Code reuse in an optimizing compiler Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications, (51-68)
- Sorkin A (1996). Some comments on “the priority-based coloring approach to register allocation”, ACM SIGPLAN Notices, 31:7, (25-29), Online publication date: 1-Jul-1996.
- Gupta M, Schonberg E and Srinivasan H (1996). A Unified Framework for Optimizing Communication in Data-Parallel Programs, IEEE Transactions on Parallel and Distributed Systems, 7:7, (689-704), Online publication date: 1-Jul-1996.
- Adl-Tabatabai A and Gross T (2019). Source-level debugging of scalar optimized code, ACM SIGPLAN Notices, 31:5, (33-43), Online publication date: 1-May-1996.
- Adl-Tabatabai A and Gross T Source-level debugging of scalar optimized code Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation, (33-43)
- Saavedra R and Smith A (1995). Performance Characterization of Optimizing Compilers, IEEE Transactions on Software Engineering, 21:7, (615-628), Online publication date: 1-Jul-1995.
- Briggs P and Cooper K Effective partial redundancy elimination Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation, (159-170)
- Briggs P and Cooper K (2019). Effective partial redundancy elimination, ACM SIGPLAN Notices, 29:6, (159-170), Online publication date: 1-Jun-1994.
- Knoop J, Rüthing O and Steffen B (2019). Lazy code motion, ACM SIGPLAN Notices, 27:7, (224-234), Online publication date: 1-Jul-1992.
- Dhamdhere D, Rosen B and Zadeck F (2019). How to analyze large programs efficiently and informatively, ACM SIGPLAN Notices, 27:7, (212-223), Online publication date: 1-Jul-1992.
- Tjiang S and Hennessy J (1992). Sharlit—a tool for building optimizers, ACM SIGPLAN Notices, 27:7, (82-93), Online publication date: 1-Jul-1992.
- Knoop J, Rüthing O and Steffen B Lazy code motion Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation, (224-234)
- Dhamdhere D, Rosen B and Zadeck F How to analyze large programs efficiently and informatively Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation, (212-223)
- Tjiang S and Hennessy J Sharlit—a tool for building optimizers Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation, (82-93)
- McFarling S (1991). Procedure merging with instruction caches, ACM SIGPLAN Notices, 26:6, (71-79), Online publication date: 1-Jun-1991.
- McFarling S Procedure merging with instruction caches Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation, (71-79)
- Gupta R (2019). A fresh look at optimizing array bound checking, ACM SIGPLAN Notices, 25:6, (272-282), Online publication date: 1-Jun-1990.
- Gupta R A fresh look at optimizing array bound checking Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation, (272-282)
- Alpert D, Averbuch A and Danieli O (1990). Performance comparison of load/store and symmetric instruction set architectures, ACM SIGARCH Computer Architecture News, 18:2SI, (172-181), Online publication date: 1-Jun-1990.
- Alpert D, Averbuch A and Danieli O Performance comparison of load/store and symmetric instruction set architectures Proceedings of the 17th annual international symposium on Computer Architecture, (172-181)
- Briggs P, Cooper K, Kennedy K and Torczon L (2019). Coloring heuristics for register allocation, ACM SIGPLAN Notices, 24:7, (275-284), Online publication date: 1-Jul-1989.
- Briggs P, Cooper K, Kennedy K and Torczon L Coloring heuristics for register allocation Proceedings of the ACM SIGPLAN 1989 conference on Programming language design and implementation, (275-284)
- Mulder H Data buffering: run-time versus compile-time support Proceedings of the third international conference on Architectural support for programming languages and operating systems, (144-151)
- Mulder H (1989). Data buffering: run-time versus compile-time support, ACM SIGARCH Computer Architecture News, 17:2, (144-151), Online publication date: 1-Apr-1989.
- Schwarz B, Kirchgässner W and Landwehr R (1988). An optimizer for Ada - design, experiences and results, ACM SIGPLAN Notices, 23:7, (175-184), Online publication date: 1-Jul-1988.
- Chow F (2019). Minimizing register usage penalty at procedure calls, ACM SIGPLAN Notices, 23:7, (85-94), Online publication date: 1-Jul-1988.
- Schwarz B, Kirchgässner W and Landwehr R An optimizer for Ada - design, experiences and results Proceedings of the ACM SIGPLAN 1988 conference on Programming language design and implementation, (175-184)
- Chow F Minimizing register usage penalty at procedure calls Proceedings of the ACM SIGPLAN 1988 conference on Programming language design and implementation, (85-94)
- Gharachorloo K, Sarkar V and Hennessy J A simple and efficient implmentation approach for single assignment languages Proceedings of the 1988 ACM conference on LISP and functional programming, (259-268)
- Wall D (2019). Global register allocation at link time, ACM SIGPLAN Notices, 21:7, (264-275), Online publication date: 1-Jul-1986.
- Wall D Global register allocation at link time Proceedings of the 1986 SIGPLAN symposium on Compiler construction, (264-275)
- McFarling S and Hennesey J Reducing the cost of branches Proceedings of the 13th annual international symposium on Computer architecture, (396-403)
- Goodman J and Hsu W On the use of registers vs. cache to minimize memory traffic Proceedings of the 13th annual international symposium on Computer architecture, (375-383)
- McFarling S and Hennesey J (2019). Reducing the cost of branches, ACM SIGARCH Computer Architecture News, 14:2, (396-403), Online publication date: 1-May-1986.
- Goodman J and Hsu W (1986). On the use of registers vs. cache to minimize memory traffic, ACM SIGARCH Computer Architecture News, 14:2, (375-383), Online publication date: 1-May-1986.
- Chow F and Hennessy J Register allocation by priority-based coloring Proceedings of the 1984 SIGPLAN symposium on Compiler construction, (222-232)
- Chow F and Hennessy J (2019). Register allocation by priority-based coloring, ACM SIGPLAN Notices, 19:6, (222-232), Online publication date: 1-Jun-1984.
- Patterson D (1984). RISC watch, ACM SIGARCH Computer Architecture News, 12:1, (11-19), Online publication date: 1-Mar-1984.
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