Skip header Section
Skip Bibliometrics Section
System Design with SystemCJune 2002
- Author:
- Thorsten Grotker
Abstract
No abstract available.
Cited By
- Rizk M, Martin K and Diguet J (2022). Run-Time Remapping Algorithm of Dataflow Actors on NoC-Based Heterogeneous MPSoCs, IEEE Transactions on Parallel and Distributed Systems, 33:12, (3959-3976), Online publication date: 1-Dec-2022.
- Bornebusch F, Lüth C, Wille R and Drechsler R Towards Automatic Hardware Synthesis from Formal Specification to Implementation Proceedings of the 25th Asia and South Pacific Design Automation Conference, (375-380)
- Gregorek D and Garcia-Ortiz A (2018). The Agamid design-space exploration framework, Design Automation for Embedded Systems, 22:4, (293-314), Online publication date: 1-Dec-2018.
Eljadiri L, Assayad I and Zakari A Generic Verification of Safety Properties For SystemC Programs Using Incomplete Interactions Proceedings of the 2nd International Conference on Smart Digital Environment, (166-171)- Leupolz J, Habermaier A and Reif W (2018). Quantitative and qualitative safety analysis of a hemodialysis machine with S#, Journal of Software: Evolution and Process, 30:5, Online publication date: 17-May-2018.
- Doucet F and Kurshan R (2017). A methodology to take credit for high-level verification during RTL verification, Formal Methods in System Design, 51:2, (395-418), Online publication date: 1-Nov-2017.
- Siegl P, Buchty R and Berekovic M A bandwidth accurate, flexible and rapid simulating multi-HMC modeling tool Proceedings of the International Symposium on Memory Systems, (71-82)
- Chalak O, Weiguang C, Wei L, Lei F, Libing Z, Jintang W, Zuguang W, Xiongli G, Haibin W and Mendelson A ScaleSimulator Proceedings of the 10th EAI International Conference on Simulation Tools and Techniques, (32-41)
- Gonzalez-de-Aledo P, Przigoda N, Wille R, Drechsler R and Sanchez P (2017). Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36:3, (475-488), Online publication date: 1-Mar-2017.
- BjØrner D (2017). Manifest domains, Formal Aspects of Computing, 29:2, (175-225), Online publication date: 1-Mar-2017.
- Jain A and Gupta R (2016). Unified and Modular Modeling and Functional Verification Framework of Real-Time Image Signal Processors, VLSI Design, 2016, (1), Online publication date: 1-Sep-2016.
- Abdi S, Aftab U, Bailey G, Boughzala B, Dewal F, Parsazad S and Tremblay E PFPSim Proceedings of the 2016 Symposium on Architectures for Networking and Communications Systems, (55-60)
- Mansouri F, Huet S and Houzet D (2016). A domain-specific high-level programming model, Concurrency and Computation: Practice & Experience, 28:3, (750-767), Online publication date: 10-Mar-2016.
- Pierre L (2016). Auxiliary Variables in Temporal Specifications, ACM Transactions on Design Automation of Electronic Systems, 21:2, (1-29), Online publication date: 28-Jan-2016.
- Automatic and configurable instrumentation of C programs with temporal assertion checkers Proceedings of the 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign, (208-217)
- Sayyah P, Lazarescu M, Bocchio S, Ebeid E, Palermo G, Quaglia D, Rosti A and Lavagno L (2015). Virtual Platform-Based Design Space Exploration of Power-Efficient Distributed Embedded Applications, ACM Transactions on Embedded Computing Systems, 14:3, (1-25), Online publication date: 21-May-2015.
- Fu D, Becker M and Szczerbicka H Universal simulation engine (USE) Proceedings of the 48th Annual Simulation Symposium, (146-154)
- Demetrescu C, Finocchi I and Ribichini A (2014). Reactive Imperative Programming with Dataflow Constraints, ACM Transactions on Programming Languages and Systems, 37:1, (1-53), Online publication date: 20-Jan-2015.
- Guo L, Zhu Q, Nuzzo P, Passerone R, Sangiovanni-Vincentelli A and Lee E Metronomy Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, (1-10)
- From visual to logical formalisms for SoC validation Proceedings of the Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign, (165-174)
- Assertion-based flow monitoring of SystemC models Proceedings of the Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign, (145-154)
- Chabot M and Pierre L A Customizable Monitoring Infrastructure for Hardware/Software Embedded Systems Proceedings of the 26th IFIP WG 6.1 International Conference on Testing Software and Systems - Volume 8763, (173-179)
- Abarbanel Y, Singerman E and Vardi M Validation of SoC Firmware-Hardware Flows Proceedings of the 51st Annual Design Automation Conference, (1-4)
- Ubal R, Schaa D, Mistry P, Gong X, Ukidave Y, Chen Z, Schirner G and Kaeli D Exploring the Heterogeneous Design Space for both Performance and Reliability Proceedings of the 51st Annual Design Automation Conference, (1-6)
- Zebelein C, Haubelt C, Falk J, Schwarzer T and Teich J Model-based actor multiplexing with application to complex communication protocols Proceedings of the conference on Design, Automation & Test in Europe, (1-4)
- Lo C, Li M, Chen L, Lu Y, Tsay R, Huang H and Yeh J (2013). Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus, ACM Transactions on Embedded Computing Systems, 13:1s, (1-25), Online publication date: 1-Nov-2013.
- Kim S, De Carli L, Sankaralingam K and Estan C SWSL Proceedings of the ninth ACM/IEEE symposium on Architectures for networking and communications systems, (191-202)
- Pierre L and Amor Z Automatic refinement of requirements for verification throughout the SoC design flow Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, (1-10)
- Kristiansen S, Plagemann T and Goebel V Modeling communication software execution for accurate simulation of distributed systems Proceedings of the 1st ACM SIGSIM Conference on Principles of Advanced Discrete Simulation, (67-78)
- Herber P and Glesner S (2013). A HW/SW co-verification framework for SystemC, ACM Transactions on Embedded Computing Systems, 12:1s, (1-23), Online publication date: 1-Mar-2013.
- Salcic Z and Malik A (2013). GALS-HMP, ACM Transactions on Embedded Computing Systems, 12:1s, (1-26), Online publication date: 1-Mar-2013.
- Wu M, Fu C, Wang P and Tsay R (2013). A distributed timing synchronization technique for parallel multi-core instruction-set simulation, ACM Transactions on Embedded Computing Systems, 12:1s, (1-24), Online publication date: 1-Mar-2013.
- Davare A, Densmore D, Guo L, Passerone R, Sangiovanni-Vincentelli A, Simalatsar A and Zhu Q (2013). metroII, ACM Transactions on Embedded Computing Systems, 12:1s, (1-31), Online publication date: 1-Mar-2013.
- Tsoi K, Becker T and Luk W (2012). Modelling reconfigurable systems in event driven simulation, ACM SIGARCH Computer Architecture News, 40:5, (34-39), Online publication date: 25-Dec-2012.
- Iqbal M and John L Efficient traffic aware power management in multicore communications processors Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems, (123-134)
- Lee D, Park H and Gerstlauer A Synthesis of optimized hardware transactors from abstract communication specifications Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (403-412)
- Wu M, Wang P, Fu C and Tsay R (2012). An Extended SystemC Framework for Efficient HW/SW Co-Simulation, ACM Transactions on Design Automation of Electronic Systems, 17:2, (1-16), Online publication date: 1-Apr-2012.
- Tabakov D and Vardi M Automatic aspectization of systemC Proceedings of the 2012 workshop on Modularity in Systems Software, (9-14)
- Chen W, Han X and Dömer R Out-of-order parallel simulation for ESL design Proceedings of the Conference on Design, Automation and Test in Europe, (141-146)
- Demetrescu C, Finocchi I and Ribichini A Reactive imperative programming with dataflow constraints Proceedings of the 2011 ACM international conference on Object oriented programming systems languages and applications, (407-426)
- Demetrescu C, Finocchi I and Ribichini A (2011). Reactive imperative programming with dataflow constraints, ACM SIGPLAN Notices, 46:10, (407-426), Online publication date: 18-Oct-2011.
- Prado B, Barros E, Figueiredo T and Aziz A HdSC Proceedings of the 24th symposium on Integrated circuits and systems design, (179-184)
- Bourgos P, Basu A, Bozga M, Bensalem S, Sifakis J and Huang K Rigorous system level modeling and analysis of mixed HW/SW systems Proceedings of the Ninth ACM/IEEE International Conference on Formal Methods and Models for Codesign, (11-20)
- Copty E, Kamhi G and Novakovsky S Transaction level statistical analysis for efficient micro-architectural power and performance studies Proceedings of the 48th Design Automation Conference, (351-356)
- Wu M, Wang P, Fu C and Tsay R A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation Proceedings of the 48th Design Automation Conference, (339-344)
- Stitt G and Vahid F (2011). Thread Warping, ACM Transactions on Design Automation of Electronic Systems, 16:3, (1-21), Online publication date: 1-Jun-2011.
- Große D, Groß M, Kühne U and Drechsler R Simulation-based equivalence checking between SystemC models at different levels of abstraction Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI, (223-228)
- Poroor J and Jayaraman B (2011). Verifying security properties of internet protocol stacks, Journal of Systems Architecture: the EUROMICRO Journal, 57:3, (269-281), Online publication date: 1-Mar-2011.
- Haxthausen A, Peleska J and Kinder S (2011). A formal approach for the construction and verification of railway control systems, Formal Aspects of Computing, 23:2, (191-219), Online publication date: 1-Mar-2011.
- Kim D, Cha K, Hong D, Choi S and Chae S (2011). A programmable video platform and its application mapping framework using the target application's systemC models, EURASIP Journal on Embedded Systems, 2011, (1-20), Online publication date: 1-Jan-2011.
- Falk J, Zebelein C, Keinert J, Haubelt C, Teich J and Bhattacharyya S (2011). Analysis of SystemC actor networks for efficient synthesis, ACM Transactions on Embedded Computing Systems, 10:2, (1-34), Online publication date: 1-Dec-2010.
- Maillet-Contoz L Standards for system level design Proceedings of the International Conference on Computer-Aided Design, (332-335)
- Tabakov D and Vardi M Optimized temporal monitors for SystemC Proceedings of the First international conference on Runtime verification, (436-451)
- Enhancing the assertion-based verification of TLM designs with reentrancy Proceedings of the Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign, (103-112)
- Monitoring temporal SystemC properties Proceedings of the Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign, (123-132)
- Ihrig C, Melhem R and Jones A Automated modeling and emulation of interconnect designs for many-core chip multiprocessors Proceedings of the 47th Design Automation Conference, (431-436)
- Viskic I, Yu L and Gajski D (2010). Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications, ACM SIGPLAN Notices, 45:4, (77-84), Online publication date: 13-Apr-2010.
- Viskic I, Yu L and Gajski D Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, (77-84)
- Kundu S, Lerner S and Gupta R (2010). Translation validation of high-level synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29:4, (566-579), Online publication date: 1-Apr-2010.
- Hwang Y, Schirner G, Abdi S and Gajski D Accurate timed RTOS model for transaction level modeling Proceedings of the Conference on Design, Automation and Test in Europe, (1333-1336)
- Zebelein C, Falk J, Haubelt C, Teich J and Dorsch R Efficient high-level modeling in the networking domain Proceedings of the Conference on Design, Automation and Test in Europe, (1189-1194)
- Wu M, Lee W, Chuang C and Tsay R Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation Proceedings of the Conference on Design, Automation and Test in Europe, (1177-1182)
- Müller M, Braun A, Gerlach J, Rosenstiel W, Nienhüser D, Zöllner J and Bringmann O Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation Proceedings of the Conference on Design, Automation and Test in Europe, (532-537)
- Bombieri N, Fummi F and Quaglia D (2010). System/network design-space exploration based on TLM for networked embedded systems, ACM Transactions on Embedded Computing Systems, 9:4, (1-32), Online publication date: 1-Mar-2010.
- Schirner G, Gerstlauer A and Dömer R (2010). Fast and accurate processor models for efficient MPSoC design, ACM Transactions on Design Automation of Electronic Systems, 15:2, (1-26), Online publication date: 1-Feb-2010.
- Schirner G, Gerstlauer A and Dömer R System-level development of embedded software Proceedings of the 2010 Asia and South Pacific Design Automation Conference, (903-909)
- Gerstlauer A and Schirner G Platform modeling for exploration and synthesis Proceedings of the 2010 Asia and South Pacific Design Automation Conference, (725-731)
- Abdi S TLM automation for multi-core design Proceedings of the 2010 Asia and South Pacific Design Automation Conference, (717-724)
- Lin K, Lo C and Tsay R Source-level timing annotation for fast and accurate TLM computation model generation Proceedings of the 2010 Asia and South Pacific Design Automation Conference, (235-240)
- Chen W and Doemer R A fast heuristic scheduling algorithm for periodic ConcurrenC models Proceedings of the 2010 Asia and South Pacific Design Automation Conference, (161-166)
- Volpi E, Fanucci L, Giambastiani A, Rocchi A, D'Ascoli F, Tonarelli M, Melani M and Marino C (2010). A mixed-signal embedded platform for automotive sensor conditioning, EURASIP Journal on Embedded Systems, 2010, (1-1), Online publication date: 1-Jan-2010.
- Gerstlauer A, Haubelt C, Pimentel A, Stefanov T, Gajski D and Teich J (2009). Electronic system-level synthesis methodologies, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28:10, (1517-1530), Online publication date: 1-Oct-2009.
- Traboulsi S, Bruns F, Showk A, Szczesny D, Hessel S, Gonzalez E and Bilgic A SDL/virtual prototype co-design for rapid architectural exploration of a mobile phone platform Proceedings of the 14th international SDL conference on Design for motes and mobiles, (239-255)
- Thabet F, Coussy P, Heller D and Martin E (2009). Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis, Journal of Signal Processing Systems, 56:2-3, (167-186), Online publication date: 1-Sep-2009.
- Silveira G, Brito A and Melcher E Functional verification of power gate design in SystemC RTL Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes, (1-5)
- Eusse J, Hübner M and Jacobi R BRICK Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes, (1-6)
- Kamhi G, Novakovsky A, Tiemeyer A and Wolffberg A MAGENTA Proceedings of the 46th Annual Design Automation Conference, (639-643)
- Riccobene E, Scandurra P, Bocchio S, Rosti A, Lavazza L and Mantellini L (2009). SystemC/C-based model-driven design for embedded systems, ACM Transactions on Embedded Computing Systems, 8:4, (1-37), Online publication date: 1-Jul-2009.
- Park S, Yoon S and Chae S (2009). A mixed-level virtual prototyping environment for SystemC-based design methodology, Microelectronics Journal, 40:7, (1082-1093), Online publication date: 1-Jul-2009.
- Kirchner T, Bannow N and Grimm C Analogue mixed signal simulation using Spice and SystemC Proceedings of the Conference on Design, Automation and Test in Europe, (284-287)
- Tanougast C, Janiaut M, Berviller Y, Rabah H, Weber S and Bouridane A (2009). An embedded and programmable system based FPGA for real time, MPEG stream buffer analysis, IEEE Transactions on Circuits and Systems for Video Technology, 19:2, (237-249), Online publication date: 1-Feb-2009.
- Lo C and Tsay R Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model Proceedings of the 2009 Asia and South Pacific Design Automation Conference, (558-563)
- Pasricha S, Dutt N and Kurdahi F Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications Proceedings of the 2009 Asia and South Pacific Design Automation Conference, (25-30)
- Bertels P, D'Haene M, Degryse T and Stroobandt D (2009). Teaching skills and concepts for embedded systems design, ACM SIGBED Review, 6:1, (1-8), Online publication date: 1-Jan-2009.
- Keinert J, Streubūhr M, Schlichter T, Falk J, Gladigau J, Haubelt C, Teich J and Meredith M (2009). SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications, ACM Transactions on Design Automation of Electronic Systems, 14:1, (1-23), Online publication date: 1-Jan-2009.
- Schirner G and Dömer R (2009). Quantitative analysis of the speed/accuracy trade-off in transaction level modeling, ACM Transactions on Embedded Computing Systems, 8:1, (1-29), Online publication date: 1-Dec-2008.
- Tabakov D, Vardi M, Kamhi G and Singerman E A temporal language for SystemC Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design, (1-9)
- Khlif M and Shawky M Observability Checking to Enhance Diagnosis of Real Time Electronic Systems Proceedings of the 2008 12th IEEE/ACM International Symposium on Distributed Simulation and Real-Time Applications, (69-74)
- Herber P, Fellmuth J and Glesner S Model checking SystemC designs using timed automata Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, (131-136)
- Suhaib S, Mathaikutty D and Shukla S (2008). A trace-based framework for verifiable GALS composition of IPs, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 16:9, (1176-1186), Online publication date: 1-Sep-2008.
- Carroll D Rapid-prototyping emulation system co-emulation modelling interface for systemC real-time emulation Proceedings of the 12th WSEAS international conference on Systems, (691-697)
- Kundu S, Lerner S and Gupta R Validating High-Level Synthesis Proceedings of the 20th international conference on Computer Aided Verification, (459-472)
- Kundu S, Ganai M and Gupta R Partial order reduction for scalable testing of systemC TLM designs Proceedings of the 45th annual Design Automation Conference, (936-941)
- Gerstlauer A, Peng J, Shin D, Gajski D, Nakamura A, Araki D and Nishihara Y Specify-explore-refine (SER) Proceedings of the 45th annual Design Automation Conference, (586-591)
- Haubelt C, Schlichter T, Keinert J and Meredith M SystemCoDesigner Proceedings of the 45th annual Design Automation Conference, (580-585)
- Classification of General Data Flow Actors into Known Models of Computation Proceedings of the Sixth ACM/IEEE International Conference on Formal Methods and Models for Co-Design, (119-128)
- Stitt G and Villarreal J Recursion flattening Proceedings of the 18th ACM Great Lakes symposium on VLSI, (131-134)
- Varma A, Debes E, Kozintsev I, Klein P and Jacob B (2008). Accurate and fast system-level power modeling, ACM Transactions on Embedded Computing Systems, 7:3, (1-20), Online publication date: 1-Apr-2008.
- Endoh Y, Imai T, Iwamasa M and Kataoka Y A pointcut-based assertion for high-level hardware design Proceedings of the 2008 AOSD workshop on Aspects, components, and patterns for infrastructure software, (1-6)
- Lettnin D, Nalla P, Ruf J, Kropf T, Rosenstiel W, Kirsten T, Schönknecht V and Reitemeyer S Verification of temporal properties in automotive embedded software Proceedings of the conference on Design, automation and test in Europe, (164-169)
- Schirner G and Dömer R Introducing preemptive scheduling in abstract RTOS models using result oriented modeling Proceedings of the conference on Design, automation and test in Europe, (122-127)
- Bombieri N, Deganello N and Fummi F Integrating RTL IPs into TLM designs through automatic transactor generation Proceedings of the conference on Design, automation and test in Europe, (15-20)
- Putnam A, Bennett D, Dellinger E, Mason J and Sundararajan P CHiMPS Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays, (261-261)
- Pasricha S, Dutt N and Ben-Romdhane M (2008). Fast exploration of bus-based communication architectures at the CCATB abstraction, ACM Transactions on Embedded Computing Systems, 7:2, (1-32), Online publication date: 1-Feb-2008.
- Damm M, Haase J, Grimm C, Herrera F and Villar E (2008). Bridging MoCs in SystemC specifications of heterogeneous systems, EURASIP Journal on Embedded Systems, 2008, (1-16), Online publication date: 30-Jan-2008.
- Dömer R, Gerstlauer A, Peng J, Shin D, Cai L, Yu H, Abdi S and Gajski D (2008). System-on-chip environment, EURASIP Journal on Embedded Systems, 2008, (1-13), Online publication date: 30-Jan-2008.
- Alassir M, Denoulet J, Romain O, Suissa A and Garda P (2008). Modelling field bus communications in mixed-signal embedded systems, EURASIP Journal on Embedded Systems, 2008, (1-11), Online publication date: 30-Jan-2008.
- Schirner G, Gerstlauer A and Dömer R Automatic generation of hardware dependent software for MPSoCs from abstract system specifications Proceedings of the 2008 Asia and South Pacific Design Automation Conference, (271-276)
- Edwards S and Zeng J Static elaboration of recursion for concurrent software Proceedings of the 2008 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation, (71-80)
- Vinh P and Bowen J Formalization of data flow computing and a coinductive approach to verifying flowware synthesis Transactions on computational science I, (1-36)
- Kitchen N and Kuehlmann A Stimulus generation for constrained random simulation Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, (258-265)
- Doucet F, Shyamasundar R, Krüger I, Joshi S and Gupta R Reactivity in systemC transaction-level models Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing, (34-50)
- Chandraiah P and Doemer R Pointer re-coding for creating definitive MPSoC models Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, (33-38)
- Indrusiak L and Glesner M Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models Proceedings of the 20th annual conference on Integrated circuits and systems design, (330-335)
- Barcelos D, Brião E and Wagner F A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs Proceedings of the 20th annual conference on Integrated circuits and systems design, (282-287)
- Varma A, Jacob B, Debes E, Kozintsev I and Klein P (2007). Accurate and fast system-level power modeling, ACM Transactions on Embedded Computing Systems, 6:4, (26-es), Online publication date: 1-Sep-2007.
- Shin C, Grun P, Romdhane N, Lennard C, Madl G, Pasricha S, Dutt N and Noll M (2007). Enabling heterogeneous cycle-based and event-driven simulation in a design flow integrated using the SPIRIT consortium specifications, Design Automation for Embedded Systems, 11:2-3, (119-140), Online publication date: 1-Sep-2007.
- Ha S, Kim S, Lee C, Yi Y, Kwon S and Joo Y (2008). PeaCE, ACM Transactions on Design Automation of Electronic Systems, 12:3, (1-25), Online publication date: 17-Aug-2007.
- Herrera F and Villar E (2008). A framework for heterogeneous specification and design of electronic embedded systems in SystemC, ACM Transactions on Design Automation of Electronic Systems, 12:3, (1-31), Online publication date: 17-Aug-2007.
- Gremzow C Compiled low-level virtual instruction set simulation and profiling for code partitioning and ASIP-synthesis in hardware/software co-design Proceedings of the 2007 Summer Computer Simulation Conference, (741-748)
- Viskic I, Abdi S and Gajski D (2007). Automatic generation of embedded communication SW for heterogeneous MPSoC platforms, ACM SIGPLAN Notices, 42:7, (143-145), Online publication date: 13-Jul-2007.
- Viskic I, Abdi S and Gajski D Automatic generation of embedded communication SW for heterogeneous MPSoC platforms Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, (143-145)
- Chandraiah P and Doemer R Designer-controlled generation of parallel and flexible heterogeneous MPSoC specification Proceedings of the 44th annual Design Automation Conference, (787-790)
- Vardi M Formal techniques for SystemC verification Proceedings of the 44th annual Design Automation Conference, (188-192)
- Bhattacharya B, Rose J and Swan S Language extensions to SystemC Proceedings of the 44th annual Design Automation Conference, (35-38)
- Scharwaechter H, Kammler D, Wieferink A, Hohenauer M, Karuri K, Ceng J, Leupers R, Ascheid G and Meyr H (2007). ASIP architecture exploration for efficient IPSec encryption, ACM Transactions on Embedded Computing Systems, 6:2, (12-es), Online publication date: 1-May-2007.
- Alessio E, Fummi F, Quaglia D and Turolla M Modeling and simulation alternatives for the design of networked embedded systems Proceedings of the conference on Design, automation and test in Europe, (1030-1035)
- Krause M, Bringmann O, Hergenhan A, Tabanoglu G and Rosentiel W Timing simulation of interconnected AUTOSAR software-components Proceedings of the conference on Design, automation and test in Europe, (474-479)
- Große D, Ebendt R and Drechsler R Improvements for constraint solving in the systemc verification library Proceedings of the 17th ACM Great Lakes symposium on VLSI, (493-496)
- Hofstra K and Gerez S Arx Proceedings of the 2nd international conference on High performance embedded architectures and compilers, (215-226)
- Haxthausen A and Peleska J A domain-oriented, model-based approach for construction and verification of railway control systems Formal methods and hybrid real-time systems, (320-348)
- Haubelt C, Falk J, Keinert J, Schlichter T, Streubühr M, Deyhle A, Hadert A and Teich J (2007). A SystemC-based design methodology for digital signal processing systems, EURASIP Journal on Embedded Systems, 2007:1, (15-15), Online publication date: 1-Jan-2007.
- Schirner G and Dömer R Fast and accurate transaction level models using result oriented modeling Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, (363-368)
- Varma A, Afridi M, Akturk A, Klein P, Hefner A and Jacob B Modeling heterogeneous SoCs with SystemC Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, (54-64)
- Schirner G and Dömer R Accurate yet fast modeling of real-time communication Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, (70-75)
- Shin D, Gerstlauer A, Peng J, Dömer R and Gajski D Automatic generation of transaction level models for rapid design space exploration Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, (64-69)
- Bombieri N, Fummi F and Quaglia D TLM/network design space exploration for networked embedded systems Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, (58-63)
- Berkenkötter K and Hannemann U Modeling the railway control domain rigorously with a UML 2.0 profile Proceedings of the 25th international conference on Computer Safety, Reliability, and Security, (398-411)
- Shinozaki A, Shima M, Guo M and Kubo M A high performance simulator system for a multiprocessor system based on a multi-way cluster Proceedings of the 11th Asia-Pacific conference on Advances in Computer Systems Architecture, (231-243)
- Edwards S (2006). The Challenges of Synthesizing Hardware from C-Like Languages, IEEE Design & Test, 23:5, (375-386), Online publication date: 1-Sep-2006.
- Yamasaki R, Kobayashi K, Zakaria N, Narazaki S and Yoshida N Refactoring-Based stepwise refinement in abstract system-level design Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing, (712-721)
- Riccobene E, Scandurra P, Rosti A and Bocchio S A model-driven design environment for embedded systems Proceedings of the 43rd annual Design Automation Conference, (915-918)
- Herrera F and Villar E A framework for embedded system specification under different models of computation in SystemC Proceedings of the 43rd annual Design Automation Conference, (911-914)
- Swan S SystemC transaction level models and RTL verification Proceedings of the 43rd annual Design Automation Conference, (90-92)
- Groβe D, Kühne U and Drechsler R HW/SW co-verification of embedded systems using bounded model checking Proceedings of the 16th ACM Great Lakes symposium on VLSI, (43-48)
- Franklin M, Tyson E, Buckley J, Crowley P and Maschmeyer J Auto-pipe and the X language Proceedings of the 20th international conference on Parallel and distributed processing, (117-117)
- Sonntag S, Gries M and Sauer C Performance Evaluation of Packet Processing Architectures Using Multiclass Queuing Networks Proceedings of the 39th annual Symposium on Simulation, (80-89)
- La Fratta P and Baker, Jr. J (2006). Exploring power reduction options for a single-chip multiprocessor through system-level modeling, Journal of Embedded Computing, 2:2, (235-247), Online publication date: 1-Apr-2006.
- Klingauf W, Gädke H and Günzel R TRAIN Proceedings of the conference on Design, automation and test in Europe: Proceedings, (1318-1323)
- Balarin F and Passerone R Functional verification methodology based on formal interface specification and transactor generation Proceedings of the conference on Design, automation and test in Europe: Proceedings, (1013-1018)
- Kogel T and Braun M Virtual prototyping of embedded platforms for wireless and multimedia Proceedings of the conference on Design, automation and test in Europe: Proceedings, (488-490)
- Streubühr M, Falk J, Haubelt C, Teich J, Dorsch R and Schlipf T Task-accurate performance modeling in SystemC for real-time multi-processor architectures Proceedings of the conference on Design, automation and test in Europe: Proceedings, (480-481)
- Kempf T, Karuri K, Wallentowitz S, Ascheid G, Leupers R and Meyr H A SW performance estimation framework for early system-level-design using fine-grained instrumentation Proceedings of the conference on Design, automation and test in Europe: Proceedings, (468-473)
- Wild T, Herkersdorf A and Ohlendorf R Performance evaluation for system-on-chip architectures using trace-based transaction level simulation Proceedings of the conference on Design, automation and test in Europe: Proceedings, (248-253)
- Künzli S, Poletti F, Benini L and Thiele L Combining simulation and formal methods for system-level performance analysis Proceedings of the conference on Design, automation and test in Europe: Proceedings, (236-241)
- Schirner G and Dömer R Quantitative analysis of transaction level models for the AMBA bus Proceedings of the conference on Design, automation and test in Europe: Proceedings, (230-235)
- Habibi A, Moinudeen H and Tahar S Generating finite state machines from SystemC Proceedings of the conference on Design, automation and test in Europe: Designers' forum, (76-81)
- Chevalier J, de Nanclas M, Filion L, Benny O, Rondonneau M, Bois G and Aboulhamid E (2006). A SystemC Refinement Methodology for Embedded Software, IEEE Design & Test, 23:2, (148-158), Online publication date: 1-Mar-2006.
- Chung M and Kyung C (2006). Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead, IEEE Transactions on Computers, 55:2, (125-136), Online publication date: 1-Feb-2006.
- Pimentel A, Erbas C and Polstra S (2006). A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels, IEEE Transactions on Computers, 55:2, (99-112), Online publication date: 1-Feb-2006.
- Edwards S Using program specialization to speed SystemC fixed-point simulation Proceedings of the 2006 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation, (21-28)
- The SystemJ approach to system-level design Proceedings of the Fourth ACM/IEEE International Conference on Formal Methods and Models for Co-Design, (149-158)
- Using Reo for formal specification and verification of system designs Proceedings of the Fourth ACM/IEEE International Conference on Formal Methods and Models for Co-Design, (113-122)
- Ouadjaout S and Houzet D (2006). Generation of embedded hardware/software from systemC, EURASIP Journal on Embedded Systems, 2006:1, (19-19), Online publication date: 1-Jan-2006.
- Belanović P, Knerr B, Holzer M and Rupp M (2006). A fully automated environment for verification of virtual prototypes, EURASIP Journal on Advances in Signal Processing, 2006, (66-66), Online publication date: 1-Jan-2006.
- Harcourt E (2005). Teaching computer organization and architecture using SystemC, Journal of Computing Sciences in Colleges, 21:2, (27-39), Online publication date: 1-Dec-2005.
- Krause M, Bringmann O and Rosenstiel W (2005). Target software generation, Design Automation for Embedded Systems, 10:4, (229-251), Online publication date: 1-Dec-2005.
- Zhang Y, Dong L, Yu G and Wang D Exploring design space using transaction level models Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture, (589-599)
- Shin D, Gerstlauer A, Dömer R and Gajski D Automatic network generation for system-on-chip communication design Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (255-260)
- Wieferink A, Leupers R, Ascheid G, Meyr H, Michiels T, Nohl A and Kogel T Retargetable generation of TLM bus interfaces for MP-SoC platforms Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (249-254)
- Dhanwada N, Lin I and Narayanan V A power estimation methodology for systemC transaction level models Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (142-147)
- Riccobene E, Scandurra P, Rosti A and Bocchio S A UML 2.0 profile for SystemC Proceedings of the 5th ACM international conference on Embedded software, (138-141)
- Wild T, Herkersdorf A and Lee G (2005). TAPES--Trace-based architecture performance evaluation with SystemC, Design Automation for Embedded Systems, 10:2-3, (157-179), Online publication date: 1-Sep-2005.
- Dhanwada N, Bergamaschi R, Dungan W, Nair I, Gramann P, Dougherty W and Lin I (2005). Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems, Design Automation for Embedded Systems, 10:2-3, (105-125), Online publication date: 1-Sep-2005.
- Kruijtzer W, Reyes V and Gehrke W (2005). Design, synthesis and verification of a smart imaging core using SystemC, Design Automation for Embedded Systems, 10:2-3, (127-155), Online publication date: 1-Sep-2005.
- Niyogi K and Marculescu D System level power and performance modeling of GALS point-to-point communication interfaces Proceedings of the 2005 international symposium on Low power electronics and design, (381-386)
- Sun J and Dong J Synthesis of distributed processes from scenario-based specifications Proceedings of the 2005 international conference on Formal Methods, (415-431)
- Pimentel A A case for visualization-integrated system-level design space exploration Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation, (455-464)
- Sonntag S, Gries M and Sauer C SystemQ Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation, (434-444)
- Kim D, Yi Y and Ha S Trace-driven HW/SW cosimulation using virtual synchronization technique Proceedings of the 42nd annual Design Automation Conference, (345-348)
- Zabawa M, Adjouadi M and Rishe N SystemC co-design for image compression Proceedings of the 4th WSEAS International Conference on Electronic, Signal Processing and Control, (1-7)
- Edwards S The Challenges of Hardware Synthesis from C-Like Languages Proceedings of the conference on Design, Automation and Test in Europe - Volume 1, (66-67)
- Lee J, Chung M, Ahn K, Lee S and Kyung C A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation Proceedings of the conference on Design, Automation and Test in Europe - Volume 1, (384-389)
- Mahadevan S, Angiolini F, Storgaard M, Olsen R, Sparso J and Madsen J A Network Traffic Generator Model for Fast Network-on-Chip Simulation Proceedings of the conference on Design, Automation and Test in Europe - Volume 2, (780-785)
- Kempf T, Doerper M, Leupers R, Ascheid G, Meyr H, Kogel T and Vanthournout B A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms Proceedings of the conference on Design, Automation and Test in Europe - Volume 2, (876-881)
- Lee J, Yang W, Kwon Y, Kim Y and Kyung C Simulation acceleration of transaction-level models for SoC with RTL sub-blocks Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (499-502)
- Gerstlauer A, Shin D, Dömer R and Gajski D System-level communication modeling for network-on-chip synthesis Proceedings of the 2005 Asia and South Pacific Design Automation Conference, (45-48)
- Belanovic P, Knerr B, Holzer M, Sauzon G and Rupp M (2005). A consistent design methodology for wireless embedded systems, EURASIP Journal on Advances in Signal Processing, 2005, (2598-2612), Online publication date: 1-Jan-2005.
- Vogt H A new method to determine the tool count of a semiconductor factory using FabSim Proceedings of the 36th conference on Winter simulation, (1925-1929)
- Posadas H, Herrera F, Fernández V, Sánchez P, Villar E and Blasco F (2004). Single Source Design Environment for Embedded Systems Based on SystemC, Design Automation for Embedded Systems, 9:4, (293-312), Online publication date: 1-Dec-2004.
- Bernstein A, Burton M and Ghenassia F How to bridge the abstraction gap in system level modeling and design Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, (910-914)
- Yang G, Sangiovanni-Vincentelli A, Watanabe Y and Balarin F Separation of concerns Proceedings of the 4th ACM international conference on Embedded software, (44-53)
- Raghavan G, Salomaki A and Lencevicius R Model based estimation and verification of mobile device performance Proceedings of the 4th ACM international conference on Embedded software, (34-43)
- Berner D, Talpin J, Le Guernic P and Shukla S Modular design through component abstraction Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, (202-211)
- Pasricha S, Dutt N and Ben-Romdhane M Fast exploration of bus-based on-chip communication architectures Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (242-247)
- van der Wolf P, de Kock E, Henriksson T, Kruijtzer W and Essink G Design and programming of embedded multiprocessors Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (206-217)
- Donlin A Transaction level modeling Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (75-80)
- Kogel T and Meyr H Heterogeneous MP-SoC Proceedings of the 41st annual Design Automation Conference, (686-691)
- Conti M, Caldari M, Vece G, Orcioni S and Turchetti C Performance analysis of different arbitration algorithms of the AMBA AHB bus Proceedings of the 41st annual Design Automation Conference, (618-621)
- Deb A, Jantsch A and Öberg J System design for DSP applications in transaction level modeling paradigm Proceedings of the 41st annual Design Automation Conference, (466-471)
- Cai L, Gerstlauer A and Gajski D Retargetable profiling for rapid, early system-level design space exploration Proceedings of the 41st annual Design Automation Conference, (281-286)
- Pasricha S, Dutt N and Ben-Romdhane M Extending the transaction level modeling approach for fast communication architecture exploration Proceedings of the 41st annual Design Automation Conference, (113-118)
- Chen Y, Du X, Zhou X and Peng C An automatic coverage analysis for systemc using UML and aspect-oriented technology Proceedings of the 8th international conference on Computer Supported Cooperative Work in Design I, (398-405)
- Patel H and Shukla S Towards a heterogeneous simulation kernel for system level models Proceedings of the 14th ACM Great Lakes symposium on VLSI, (248-253)
- Hartenstein R The digital divide of computing Proceedings of the 1st conference on Computing frontiers, (357-362)
- Talpin J, Le Guernic P, Shukla S, Doucet F and Gupta R (2004). Formal Refinement Checking in a System-level Design Methodology, Fundamenta Informaticae, 62:2, (243-273), Online publication date: 1-Apr-2004.
- Blaurock O A SystemC-Based Modular Design and Verification Framework for C-Model Reuse in a HW/SW-Co-Design Flow Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7, (838-843)
- Bruschi F and Bombana M A Design Methodology for the Exploitation of High Level Communication Synthesis Proceedings of the conference on Design, automation and test in Europe - Volume 3
- Schubert T, Hanisch J, Gerlach J, Appell J and Nebel W Evaluation of a Refinement-Driven SystemC"-Based Design Flow Proceedings of the conference on Design, automation and test in Europe - Volume 3
- Bannow N and Haug K Evaluation of an Object-Oriented Hardware Design Methodology for Automotive Applications Proceedings of the conference on Design, automation and test in Europe - Volume 3
- Bona A, Zaccaria V and Zafalon R System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip Proceedings of the conference on Design, automation and test in Europe - Volume 3
- Lettnin D, Braun A, Bodgan M, Gerlach J and Rosenstiel W Synthesis of Embedded SystemC Design Proceedings of the conference on Design, automation and test in Europe - Volume 3
- Wieferink A, Kogel T, Leupers R, Ascheid G, Meyr H, Braun G and Nohl A A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms Proceedings of the conference on Design, automation and test in Europe - Volume 2
- Deb A, Jantsch A and Öberg J System Design for DSP Applications Using the MASIC Methodology Proceedings of the conference on Design, automation and test in Europe - Volume 1
- Posadas H, Herrera F, Sánchez P, Villar E and Blasco F System-Level Performance Analysis in SystemC Proceedings of the conference on Design, automation and test in Europe - Volume 1
- Sciuto D, Martin G, Rosenstiel W, Swan S, Ghenassia F, Flake P and Srouji J SystemC and SystemVerilog Proceedings of the conference on Design, automation and test in Europe - Volume 1
- Post G, Venkataraghavan P, Ray T and Seetharaman D A SystemC-Based Verification Methodology for Complex Wireless Software IP Proceedings of the conference on Design, automation and test in Europe - Volume 1
- Densmore D, Rekhi S and Sangiovanni-Vincentelli A Microarchitecture Development via Metropolis Successive Platform Refinement Proceedings of the conference on Design, automation and test in Europe - Volume 1
- Bergamaschi R Early and accurate analysis of SoCs Proceedings of the 2004 international workshop on System level interconnect prediction, (3-6)
- Talpin J, Le Guernic P, Shukla S, Doucet F and Gupta R (2004). Formal Refinement Checking in a System-level Design Methodology, Fundamenta Informaticae, 62:2, (243-273), Online publication date: 1-Feb-2004.
- Shin D, Abdi S and Gajski D Automatic generation of bus functional models from transaction level models Proceedings of the 2004 Asia and South Pacific Design Automation Conference, (756-758)
- Yu H, Dömer R and Gajski D Embedded software generation from system level design languages Proceedings of the 2004 Asia and South Pacific Design Automation Conference, (463-468)
- Schulz-Key C, Winterholer M, Schweizer T, Kuhn T and Rosenstiel W Object-oriented modeling and synthesis of SystemC specifications Proceedings of the 2004 Asia and South Pacific Design Automation Conference, (238-243)
- Patel H and Shukla S Truly heterogeneous modeling with systemC Formal methods and models for system design, (83-101)
- Chevalier J, Benny O, Rondonneau M, Bois G, Aboulhamid E and Boyer F Space Languages for system specification, (91-104)
- Checkers for SystemC designs Proceedings of the Second ACM/IEEE International Conference on Formal Methods and Models for Co-Design, (171-178)
- Gallery R and Shakya D Hardware/software partitioning and simulation with SystemC Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing, (1-4)
- Vogt H Factory capacity and throughput planning Proceedings of the 35th conference on Winter simulation: driving innovation, (1383-1387)
- Bergamaschi R, Shin Y, Dhanwada N, Bhattacharya S, Dougherty W, Nair I, Darringer J and Paliwal S SEAS Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (150-155)
- Yu H, Gerstlauer A and Gajski D RTOS scheduling in transaction level models Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (31-36)
- Grimpe E and Oppenheimer F Extending the SystemC synthesis subset by object-oriented features Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (25-30)
- Cai L and Gajski D Transaction level modeling Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (19-24)
- Kogel T, Doerper M, Wieferink A, Leupers R, Ascheid G, Meyr H and Goossens S A modular simulation framework for architectural exploration of on-chip interconnection networks Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (7-12)
- Damaševičius R, Majauskas G and Štuikys V Application of design patterns for hardware design Proceedings of the 40th annual Design Automation Conference, (48-53)
- Qin W and Malik S Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
- Vachoux A, Grimm C and Einwich K SystemC-AMS Requirements, Design Objectives and Rationale Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
- Caldari M, Conti M, Crippa P, Marozzi G, Di Gennaro F, Orcioni S and Turchetti C SystemC Modeling of a Bluetooth Transceiver Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
- Bruschi F and Ferrandi F Synthesis of Complex Control Structures from Behavioral SystemC Models Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
- Sayinta A, Canverdi G, Pauwels M, Alshawa A and Dehaene W A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
- Carbognani F, Lennard C, Ip C, Cochrane A and Bates P Qualifying Precision of Abstract SystemC Models Using the SystemC Verification Standard Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
- Caldari M, Conti M, Coppola M, Curaba S, Pieralisi L and Turchetti C Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
- Onishi Y, Muraoka M, Utsuki M and Tsubaki N VCore-based platform for SoC design Proceedings of the 2003 Asia and South Pacific Design Automation Conference, (453-458)
- Gerstlauer A and Gajski D System-level abstraction semantics Proceedings of the 15th international symposium on System Synthesis, (231-236)
Recommendations
SystemC-based Co-Simulation/Analysis for System-Level Hardware/Software Co-Design
Highlights- Electronic system-level HW/SW co-design of heterogeneous parallel embedded systems.
- SystemC-based electronic system-level functional and timing HW/SW co-simulation.
- System-level multi model of computation co-analysis (communication ...
AbstractHeterogeneous parallel devices are becoming increasingly common in the embedded systems field. This is primarily due to their ability to improve timing performance, while simultaneously reducing costs and energy. In this context, this study ...
Graphical abstractDisplay Omitted
SystemC-based Reconfigurable IP Modelling for System-on-Chip Design
AHS '08: Proceedings of the 2008 NASA/ESA Conference on Adaptive Hardware and SystemsA new system-level approach is needed to incorporate reconfigurability in IP-inegration design flow, in order to speed up the designer's productivity. SystemC is used as a system level language to raise the abstraction level for embedded systems design ...