Browse Theses

As a result of advances in compiler technology, almost all programs are written in high-level languages, and the effectiveness of a computer architecture is determined by its suitability as a compiler target. This central role of compilers in the use of computers has led computer architects to study the implementation of high-level language programs. This thesis presents measurements for a set of Portable Standard Lisp programs that were executed on a reduced-instruction-set processor (MIPS-X), examining what instructions LISP uses at the assembly level, and how much time is spent on the most common primitive LISP operations. This information makes it possible to determine which operations are time critical and to evaluate how well architectural features address these operations.Based on these data, three areas for optimization are proposed: the implementation of the tags used for run-time type checking, reducing the cost of procedure calls, and interprocedural register allocation. A number of methods to implement tags, both with and without hardware support, are presented, and the performance of the different implementation strategies is compared. To reduce the cost of procedure calls, time critical LISP system functions were optimized and inlined, and procedure integration under control of the compiler was implemented. The effectiveness of these optimizations, and their effect on the miss rate in the MIPS-X on-chip instruction cache are studied. A simple register allocator uses interprocedural information to reduce the cost of saving and restoring registers across procedure calls. This register allocation scheme is evaluated, and its performance is compared with hardware register windows.