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Hardware-software co-design of embedded systems: the POLIS approachOctober 1997
Abstract
No abstract available.
Cited By
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- Paul J, Peffers S and Thomas D Frequency interleaving as a codesign scheduling paradigm Proceedings of the eighth international workshop on Hardware/software codesign, (131-135)
- Lajolo M, Lavagno L, Rebaudengo M, Reorda M and Violante M Automatic test bench generation for simulation-based validation Proceedings of the eighth international workshop on Hardware/software codesign, (136-140)
- Buck J and Vaidyanathan R Heterogeneous modeling and simulation of embedded systems in El Greco Proceedings of the eighth international workshop on Hardware/software codesign, (142-146)
- da Silva J, Sgroi M, De Bernardinis F, Li S, Sangiovanni-Vincentelli A and Rabaey J Wireless protocols design Proceedings of the eighth international workshop on Hardware/software codesign, (147-151)
- Paul J, Peffers S and Thomas D A codesign virtual machine for hierarchical, balanced hardware/software system modeling Proceedings of the 37th Annual Design Automation Conference, (390-395)
- de Kock E, Smits W, van der Wolf P, Brunel J, Kruijtzer W, Lieverse P, Vissers K and Essink G YAPI Proceedings of the 37th Annual Design Automation Conference, (402-405)
- Kim C, Lavagno L and Sangiovanni-Vincentelli A Free MDD-based software optimization techniques for embedded systems Proceedings of the conference on Design, automation and test in Europe, (14-19)
- Lajolo M, Raghunathan A and Dey S Efficient power co-estimation techniques for system-on-chip design Proceedings of the conference on Design, automation and test in Europe, (27-34)
- Baleani M, Ferrari A, Sangiovanni-Vincentelli A and Turchetti C HW/SW codesign of an engine management system Proceedings of the conference on Design, automation and test in Europe, (263-269)
- Balarin F Automatic abstraciton for worst-case analysis of discrete systems Proceedings of the conference on Design, automation and test in Europe, (494-501)
- Lajolo M, Rebaudengo M, Roerda M, Violante M and Lavagno L Evaluating system dependability in a co-design framework Proceedings of the conference on Design, automation and test in Europe, (586-590)
- Yoo S, Lee J, Jung J, Rha K, Cho Y and Choi K Fast hardware-software coverification by optimistic execution of real processor Proceedings of the conference on Design, automation and test in Europe, (663-668)
- Ramanathan D, Jejurikar R and Gupta R Timing driven co-design of networked embedded systems Proceedings of the 2000 Asia and South Pacific Design Automation Conference, (117-122)
- Ernst R and Jerraya A embedded system design with multiple languages Proceedings of the 2000 Asia and South Pacific Design Automation Conference, (391-396)
- Eisenring M, Thiele L and Zitzler E (2000). Conflicting Criteria in Embedded System Design, IEEE Design & Test, 17:2, (51-59), Online publication date: 1-Apr-2000.
- Muth A and Färber G SDL as a system level specification language for application-specific hardware in a rapid prototyping environment Proceedings of the 13th international symposium on System synthesis, (157-162)
- Meerwein M, Baumgartner C, Wieja T and Glauert W Embedded systems verification with FGPA-enhanced in-circuit emulator Proceedings of the 13th international symposium on System synthesis, (143-148)
- van der Wolf P, Lieverse P, Goel M, La Hei D and Vissers K An MPEG-2 decoder case study as a driver for a system level design methodology Proceedings of the seventh international workshop on Hardware/software codesign, (33-37)
- Clouté F, Contensou J, Esteve D, Pampagnin P, Pons P and Favard Y Hardware/software co-design of an avionics communication protocol interface system Proceedings of the seventh international workshop on Hardware/software codesign, (48-52)
- Coste P, Hessel F, Le Marrec P, Sugar Z, Romdhani M, Suescun R, Zergainoh N and Jarraya A Multilanguage design of heterogeneous systems Proceedings of the seventh international workshop on Hardware/software codesign, (54-58)
- Lajolo M, Lazarescu M and Sangiovanni-Vincentelli A A compilation-based software estimation scheme for hardware/software co-simulation Proceedings of the seventh international workshop on Hardware/software codesign, (85-89)
- Hsiung P Timing coverification of concurrent embedded real-time systems Proceedings of the seventh international workshop on Hardware/software codesign, (110-114)
- Brunel J, de Kock E, Kruijtzer W, Kenter H and Smits W Communication refinement in video systems on chip Proceedings of the seventh international workshop on Hardware/software codesign, (142-146)
- Bates I, Chester E and Kinniment D A statechart based HW/SW codesign system Proceedings of the seventh international workshop on Hardware/software codesign, (162-166)
- Ramanathan D, Dasdan A and Gupta R Timing-driven HW/SW codesign based on task structuring and process timing simulation Proceedings of the seventh international workshop on Hardware/software codesign, (203-207)
- Cabodi G, Camurati P, Passerone C and Quer S Computing timed transition relations for sequential cycle-based simulation Proceedings of the conference on Design, automation and test in Europe, (4-es)
- Dave B CRUSADE Proceedings of the conference on Design, automation and test in Europe, (22-es)
- O'Nils M and Jantsch A Operating system sensitive device driver synthesis from implementation independent protocol specification Proceedings of the conference on Design, automation and test in Europe, (113-es)
- Lavagno L and Sentovich E ECL Proceedings of the 36th annual ACM/IEEE Design Automation Conference, (511-516)
- Guerra L, Fitzner J, Talukdar D, Schläger C, Tabbara B and Zivojnovic V Cycle and phase accurate DSP modeling and integration for HW/SW co-verification Proceedings of the 36th annual ACM/IEEE Design Automation Conference, (964-969)
- Chiaberge M, Miranda E and Reyneri L An HW/SWCo-Design Approach for Neuro-Fuzzy Hardware Design Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
- Lahiri K, Raghunathan A and Dey S Fast performance analysis of bus-based system-on-chip communication architectures Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (566-573)
- Thiele L, Strehl K, Ziegenbein D, Ernst R and Teich J FunState—an internal design representation for codesign Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (558-565)
- Hsieh H and Balarin F Synchronous equivalence for embedded systems Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (505-510)
- Verkest D, Da Silva J, Ykman C, Croes K, Miranda M, Wuytack S, Catthoor F, De Jong G and De Man H (1999). Matisse, Journal of VLSI Signal Processing Systems, 21:3, (185-194), Online publication date: 1-Jul-1999.
- Cuatto T, Passeronge C, Lavagno L, Jurecska A, Damiano A, Sansoè C, Sangiovanni-Vincentelli A and Sangiovanni-Vincentelli A A case study in embedded system design Proceedings of the 35th annual Design Automation Conference, (804-807)
- Hong Y, Beerel P, Lavagno L and Sentovich E Don't care-based BDD minimization for embedded software Proceedings of the 35th annual Design Automation Conference, (506-509)
- Martin G Design methodologies for system level IP Proceedings of the conference on Design, automation and test in Europe, (286-289)
- Filippi E, Lavagno L, Licciardi L, Montanaro A, Paolini M, Passerone R, Sgroi M and Sangiovanni-Vincentelli A Intellectual property re-use in embedded system co-design Proceedings of the 11th international symposium on System synthesis, (37-42)
- Lajolo M, Raghunathan A, Dey S, Lavagno L and Sangiovanni-Vincentelli A A case study on modeling shared memory access effects during performance analysis of HW/SW systems Proceedings of the 6th international workshop on Hardware/software codesign, (117-121)
- Liu J, Lajolo M and Sangiovanni-Vincentelli A Software timing analysis using HW/SW cosimulation and instruction set simulator Proceedings of the 6th international workshop on Hardware/software codesign, (65-69)
- Eisenring M and Teich J Domain-specific interface generation from dataflow specifications Proceedings of the 6th international workshop on Hardware/software codesign, (43-47)
- Passerone C, Passerone R, Sansoè C, Martin J, Sangiovanni-Vincentelli A and McGeer R Modeling reactive systems in Java Proceedings of the 6th international workshop on Hardware/software codesign, (15-19)
- Dasdan A, Ramanathan D and Gupta R Rate derivation and its applications to reactive, real-time embedded systems Proceedings of the 35th annual Design Automation Conference, (263-268)
Index Terms
- Hardware-software co-design of embedded systems: the POLIS approach
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