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Reviewer: Festus Gail Gray

State-of-the-art techniques for system-level design methodologies are summarized in this excellent book. The audience includes system design engineers and managers, CAD tool developers, and university faculty and students. The VHDL user community should find this book useful. As the later stages of design have become more automated, designers have begun to focus more effort on the earlier stages of design. Whereas traditional design methodology has been based on the “describe and synthesize” paradigm, the authors propose a new design paradigm based on formal, verifiable system specifications followed by automated or semi-automated synthesis into lower representation levels. Although this book concentrates on embedded systems (systems in which the behavior is completely defined in terms of the system's interaction with its environment), the philosophy could be extended to more general systems. The authors claim that specifications in natural languages, such as English, are ambiguous and incomplete. I concur. Toward the development of an unambiguous and complete high-level specification, the book begins by separating the concepts of a model (a means of specifying the functionality of the system) and its implementation in a simulatable language. This section is thorough and complete. It covers state-oriented models (such as finite state machines), activity-oriented models (such as dataflow graphs), structure-oriented models (such as block diagrams), data-oriented models (such as the entity-relationship model), and heterogeneous models (such as object-oriented models). After a model is selected, the next step is to create an executable specification for the model using a programming language. To enhance automation, it is desirable to have a one-to-one correspondence between model features and language constructs. If a language contains a single construct that implements a feature, the language is said to directly support that feature. The section that analyzes the characteristics of models and examines features of common languages that directly support these characteristics is one of the best that I have seen. Desirable model features include concurrency, state transitions, hierarchy, sequential behavior, behavior completion, communications, synchronization, exception handling, and nondeterminism. After showing that most commonly used languages (including the very high-speed integrated circuit hardware description language VHDL, Verilog, CSP, and Statecharts) fail to directly support one or more of the desirable features, the authors argue that embedded systems do not need communications, synchronization, or nondeterminism. Still, traditional languages do not meet all of the remaining goals. For example, VHDL does not directly support state transitions or exception handling and is weak on behavior hierarchy. Following this discussion, the authors describe an extension of VHDL, SpecCharts, that meets all of the desirable features for embedded systems. A later chapter shows how to use SpecCharts as a front-end language that is translated into VHDL. The book proposes a system design methodology that starts with an executable functional specification at the highest level. System design consists of three well-defined tasks (allocation, partitioning, and refinement) performed on three classes of objects (variables, behaviors, and channels). Allocation defines system components for the functional specification. Partitioning assigns functional objects to allocated components. Refinement upgrades the original partitioning. Separate chapters are devoted to partitioning and refinement. Conspicuously absent is a chapter on allocation algorithms. Everyone involved with system design will find something useful in this book. The discussion of model features and language constructs that support the features alone is well worth the price of the book. I highly recommend reading it.