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The cache memory bookSeptember 1993
- Author:
- Jim Handy
Abstract
No abstract available.
Cited By
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- Shindi R and Cooper S (2006). Evaluate the performance changes of processor simulator benchmarks When context switches are incorporated, ACM SIGAda Ada Letters, XXVI:3, (9-14), Online publication date: 17-Nov-2006.
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- Emerson E and Kahlon V Rapid parameterized model checking of snoopy cache coherence protocols Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems, (144-159)
- Theelen B, Verschueren A, Suárez V, Stevens M and Nuñez A (2003). A scalable single-chip multi-processor architecture with on-chip RTOS kernel, Journal of Systems Architecture: the EUROMICRO Journal, 49:12-15, (619-639), Online publication date: 1-Dec-2003.
- Delzanno G (2003). Constraint-Based Verification of Parameterized Cache Coherence Protocols, Formal Methods in System Design, 23:3, (257-301), Online publication date: 1-Nov-2003.
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- Machanick P, Salverda P and Pompe L (1998). Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy, ACM SIGOPS Operating Systems Review, 32:5, (105-114), Online publication date: 1-Dec-1998.
- Machanick P, Salverda P and Pompe L Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy Proceedings of the eighth international conference on Architectural support for programming languages and operating systems, (105-114)
- Machanick P, Salverda P and Pompe L (1998). Hardware-software trade-offs in a direct Rambus implementation of the RAMpage memory hierarchy, ACM SIGPLAN Notices, 33:11, (105-114), Online publication date: 1-Nov-1998.
- Mak P, Blake M, Jones C, Strait G and Turgeon P (1997). Shared-cache clusters in a system with a fully shared memory, IBM Journal of Research and Development, 41:4-5, (429-448), Online publication date: 1-Jul-1997.
Index Terms
- The cache memory book
Recommendations
Shanthi Ambalavanan
The book gives a thorough understanding of cache concepts and design. Explanations of cache concepts using metaphors such as a clerk's desk next to filing cabinets make understanding concepts easy for a beginner. The figures in the book are very descriptive. Highlighting cache-specific buzz words, along with a glossary at the end, makes the book an easy reference for cache-related terms. The coherency protocols are explained well. Finally, the design examples at the end give the reader an in-depth understanding of the cache design process. Exercise problems would be a welcome addition.
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