The Dynamic Instruction Stream Computer is a novel computer architecture which addresses many of the problems present in real-time systems. The DISC operates by allowing multiple instruction streams (ISs), representing different processes to run concurrently by instruction interleaving on the pipeline. Also, the throughput of the DISC can be partitioned in any way between the multiple ISs. Conventional architectures are more concerned with overall performance and throughput than with real-time response. In other words, they optimize the system to the functions that are more heavily used without regard to responsiveness to individual requests. Applications abound where a high degree of responsiveness is required, without too much sacrifice of overall efficiency. This is particularly true in real-time control applications where it is important to optimize the critical loops and respond promptly to interrupts. DISC addresses this problem by dynamically partitioning the processor throughput between multiple instruction streams based upon requirement demands. In this way different tasks and interrupt priorities can be assigned to guarantee their deadlines.
Index Terms
- Disc, a dynamic instruction stream computer
Recommendations
A dynamic instruction set computer
FCCM '95: Proceedings of the IEEE Symposium on FPGA's for Custom Computing MachinesAbstract: A dynamic instruction set computer (DISC) has been developed that supports demand-driven modification of its instruction set. Implemented with partially reconfigurable FPGAs, DISC treats instructions as removable modules paged in and out ...
A Multiple-Stream Registerless Shared-Resource Processor
A novel high-performance processor architecture for processing a large number of independent instruction streams is proposed and its operating behavior studied. The proposed processor operates on instruction words in a two-address format (thereby ...