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Effective parameterization of architectural registers for register allocation algorithms

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Published:01 June 2000Publication History
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Abstract

Code Selection in translation has been effectively abstracted out in terms of tree rewriting or pattern matching based approaches. However, modelling register files in an architecture independent way is a problem which is bypassed in most available algorithms. Architectural parameterization is frequently just code selector generation while architectural registers and operand constraints are handled in a machine-specific way. To partially address this issue, we present an abstraction for register allocation and assignment in non-uniform register file architectures in terms of bipartite graph matching.

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  1. Effective parameterization of architectural registers for register allocation algorithms

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              cover image ACM SIGPLAN Notices
              ACM SIGPLAN Notices  Volume 35, Issue 6
              June 2000
              39 pages
              ISSN:0362-1340
              EISSN:1558-1160
              DOI:10.1145/352029
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              Copyright © 2000 Authors

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              Association for Computing Machinery

              New York, NY, United States

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              • Published: 1 June 2000

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