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A Machine Learning Attack Resistant Dual-mode PUF

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Published:30 May 2018Publication History

ABSTRACT

Silicon Physical Unclonable Function (PUF) is arguably the most promising hardware security primitive. In particular, PUFs that are capable of generating a large amount of challenge response pairs (CRPs) can be used in many security applications. However, these CRPs can also be exploited by machine learning attacks to model the PUF and predict its response. In this paper, we first show that, based on data in the public domain, two popular PUFs that can generate CRPs (i.e., arbiter PUF and reconfigurable ring oscillator (RO) PUF) can be broken by simple logistic regression (LR) attack with about 99% accuracy. We then propose a feedback structure to XOR the PUF response with the challenge and challenge the PUF again to generate the response. Results show that this successfully reduces LR's learning accuracy to the lower 50%, but artificial neural network (ANN) learning attack still has an 80% success rate. Therefore, we propose a configurable ring oscillator based dual-mode PUF which works with both odd number of inverters (like the reconfigurable RO PUF) and even number of inverters (like a bistable ring (BR) PUF). Since currently there are no known attacks that can model both RO PUF and BR PUF, the dual-mode PUF will be resistant to modeling attacks as long as we can hide its working mode from the attackers, which we achieve with two practical methods. Finally, we implement the proposed dual-mode PUF on Nexys 4 FPGA boards and collect real measurement to show that it reduces the learning accuracy of LR and ANN to the mid-50% and low 60%, respectively. In addition, it meets the PUF requirements of uniqueness, randomness, and robustness.

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  1. A Machine Learning Attack Resistant Dual-mode PUF

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    • Published in

      cover image ACM Conferences
      GLSVLSI '18: Proceedings of the 2018 on Great Lakes Symposium on VLSI
      May 2018
      533 pages
      ISBN:9781450357241
      DOI:10.1145/3194554

      Copyright © 2018 ACM

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      Publication History

      • Published: 30 May 2018

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      GLSVLSI '18 Paper Acceptance Rate48of197submissions,24%Overall Acceptance Rate312of1,156submissions,27%

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