Index Terms
- Good news and bad news on the intellectual property front
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Interconnect intellectual property for network-on-chip (NoC)
Special issue: Networks on chipAs technology scales down, the interconnect for on-chip global communication becomes the delay bottleneck. In order to provide well-controlled global wire delay and efficient global communication, a Network-on-Chip (NoC) architecture was proposed by ...
The Bad Truth about Laplace's Transform
Inverting the Laplace transform is a paradigm for exponentially ill-posed problems. For a class of operators, including the Laplace transform, we give forward and inverse formulae that have fast implementations using the fast Fourier transform. These ...
Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC Architectures
System-on-chip (SoC) developers utilize intellectual property (IP) cores from third-party vendors due to increasing design complexity, cost, as well as time-to-market constraints. A typical SoC consists of a wide variety of IP cores [such as processor, ...
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