Stephen Yang
ABSTRACT
The advances of FPGA technology and increasing size of FPGA designs pose great challenges on FPGA design tools. Deep research on FPGA physical design problems is paramount to improve industrial tools. This contest is the first ISPD contest on FPGA CAD tools. Routability driven FPGA placement, in context of large designs modern FPGA architecture, is one of the best topics to start the effort.
- R. Aggarwal, 2014. FPGA Place and Route Challenges. In Proc. of International Symposium on Physical Design.Google Scholar
Digital Library
- Xilinx, "UltraScale Architecture", http://www.xilinx.com/products/technology/ultrascale.htmlGoogle Scholar
- Xilinx, "Virtex UltraScale FPGAs", http://www.xilinx.com/publications/prod_mktg/ultrascalevirtex-product-tableGoogle Scholar
- Xilinx, "UltraScale Architecture Configurable Logic Block User Guide", http://www.xilinx.com/support/documentation/user_guides/ug574-ultrascale-clb.pdfGoogle Scholar
- Xilinx, "UltraScale Architecture and Product Overview", http://www.xilinx.com/support/documentation/data_sheets/ds890-ultrascale-overview.pdfGoogle Scholar
- GNL: http://users.elis.ugent.be/~dstrooba/gnl/Google Scholar
Index Terms
- Routability-Driven FPGA Placement Contest
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