Hung-Yi Liu
ABSTRACT
This paper makes several contributions to address the challenge of supervising HLS tools for design space exploration (DSE). We present a study on the application of learning-based methods for the DSE problem, and propose a learning model for HLS that is superior to the best models described in the literature. In order to speedup the convergence of the DSE process, we leverage transductive experimental design, a technique that we introduce for the first time to the CAD community. Finally, we consider a practical variant of the DSE problem, and present a solution based on randomized selection with strong theory guarantee.
- G. Beltrame, L. Fossati, and D. Sciuto. Decision-theoretic design space exploration of multiprocessor platforms. IEEE TCAD, 29(7):1083--1095, July 2010. Google Scholar
Digital Library
- L. Breiman. Random forests. Mach. Learn., 45(1):5--32, Oct. 2001. Google ScholarDigital Library
- B. Carrion Schafer and K. Wakabayashi. Machine learning predictive modelling high-level synthesis design space exploration. Computers Digital Techniques, IET, 6(3):153--159, May 2012.Google Scholar
- R. Caruana, N. Karampatziakis, and A. Yessenalina. An empirical evaluation of supervised learning in high dimensions. In Proc. of the 25th Intl. Conf. on Machine learning, pages 96--103, 2008. Google ScholarDigital Library
- T. H. Cormen, C. E. Leiserson, R. L. Rivest, and C. Stein. Introduction to Algorithms. The MIT Press, 3rd edition, 2009. Google ScholarDigital Library
- C. Cortes and M. Mohri. On transductive regression. In Advances in Neural Information Processing Systems (NIPS), pages 305--312, 2006.Google Scholar
- K. Deb, A. Pratap, S. Agarwal, and T. Meyarivan. A fast and elitist multiobjective genetic algorithm: Nsga-ii. IEEE Trans. on Evolutionary Computation, 6(2):182--197, Apr. 2002. Google ScholarDigital Library
- G. Mariani, G. Palermo, V. Zaccaria, and C. Silvano. Oscar: An optimization methodology exploiting spatial correlation in multicore design spaces. IEEE TCAD, 31(5):740--753, May 2012.Google Scholar
- G. Martin and G. Smith. High-level synthesis: Past, present, and future. IEEE Design Test of Computers, 26(4):18--25, Aug. 2009. Google ScholarDigital Library
- B. Ozisikyilmaz, G. Memik, and A. Choudhary. Efficient system design space exploration using machine learning techniques. In Proc. of DAC, pages 966--969, 2008. Google ScholarDigital Library
- G. Palermo, C. Silvano, and V. Zaccaria. Respir: A response surface-based pareto iterative refinement for application-specific design space exploration. IEEE TCAD, 28(12):1816--1829, Dec. 2009. Google ScholarDigital Library
- R Core Team. R: A Language and Environment for Statistical Computing. R Foundation for Statistical Computing, Vienna, Austria, 2012.Google Scholar
- B. C. Schafer, T. Takenaka, and K. Wakabayashi. Adaptive simulated annealer for high level synthesis design space exploration. In Proc. of VLSI-DAT, pages 106--109, Apr. 2009.Google ScholarCross Ref
- B. Scholkopf and A. J. Smola. Learning with Kernels: Support Vector Machines, Regularization, Optimization, and Beyond. MIT Press, 2001. Google ScholarDigital Library
- S. Xydis, G. Palermo, V. Zaccaria, and C. Silvano. A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customization. In Proc. of DATE, 2013. Google ScholarDigital Library
- K. Yu, J. Bi, and V. Tresp. Active learning via transductive experimental design. In Proc. of the 23rd Intl. Conf. on Machine learning, pages 1081--1088, 2006. Google ScholarDigital Library
- M. Zuluaga, A. Krause, P. Milder, and M. Püschel. "Smart" design space sampling to predict Pareto-optimal solutions. In Proc. of LCTES, pages 119--128, 2012. Google ScholarDigital Library
Index Terms
- On learning-based methods for design-space exploration with high-level synthesis
Recommendations
Learning from the Past: Efficient High-level Synthesis Design Space Exploration for FPGAs
The quest to democratize the use of Field-Programmable Gate Arrays (FPGAs) has given High-Level Synthesis (HLS) the final push to be widely accepted with FPGA vendors strongly supporting this VLSI design methodology to expand the FPGA user base. HLS takes ...
Transfer Learning for Design-Space Exploration with High-Level Synthesis
MLCAD '20: Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CADHigh-level synthesis (HLS) raises the level of design abstraction, expedites the process of hardware design, and enriches the set of final designs by automatically translating a behavioral specification into a hardware implementation. To obtain ...
Accelerating FPGA Prototyping through Predictive Model-Based HLS Design Space Exploration
DAC '19: Proceedings of the 56th Annual Design Automation Conference 2019One of the advantages of High-Level Synthesis (HLS), also called C-based VLSI-design, over traditional RT-level VLSI design flows, is that multiple micro-architectures of unique area vs. performance can be automatically generated by setting different ...
Comments