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Single pass depth peeling via CUDA rasterizer

Published:03 August 2009Publication History

ABSTRACT

Multi-fragment effects play important roles on many graphics applications, which require operations on more than one fragment per pixel. The classical depth peeling algorithm [Everitt 2001] peels off one layer each pass, but the performance degrades for large scenes. We prefer to capture multiple fragments in a single pass, which is difficult because the fragments generated in graphics pipeline are not allowed to be scattered to arbitrary positions of the buffers. Compute unified device architecture (CUDA) [NVIDIA 2008] provides more flexible control over the GPU memory, but accessing of the fragments generated by graphics pipeline is not yet supported. In this work we design a CUDA rasterizer so that many graphics applications can benefit from the free control of GPU memory, especially for the multi-fragment effects. We present two efficient schemes to capture and sort multiple fragments per pixel in a single geometry pass via the atomic operations of CUDA without read-modify-write (RMW) hazards. Experimental results show significant speedup to classical depth peeling, especially for large scenes.

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References

  1. Carpenter, L. 1984. The a-buffer, an antialiased hidden surface method. In Proceedings of the 11th annual conference on Computer graphics and interactive techniques, 103--108.Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Everitt, C. 2001. Interactive order-independent transparency. Tech. rep., NVIDIA Corporation.Google ScholarGoogle Scholar
  3. Myers, K., and Bavoil, L. 2007. Stencil routed a-buffer. ACM SIGGRAPH 2007 Technical Sketch Program. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. NVIDIA. 2008. Nvidia cuda: Compute unified device architecture.Google ScholarGoogle Scholar

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          • Published in

            cover image ACM Conferences
            SIGGRAPH '09: SIGGRAPH 2009: Talks
            August 2009
            82 pages
            ISBN:9781605588346
            DOI:10.1145/1597990

            Copyright © 2009 Copyright is held by the author/owner(s).

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            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 3 August 2009

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