B. Fiethe
ABSTRACT
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of traditional rad-hard or fully commercial design approaches, a System-on-Chip (SoC) solution based on state-of-the-art FPGA is introduced. This design has been successfully demonstrated in space on Venus Express. From this, a reconfigurable DPU design for future advanced imaging sensors is derived using embedded processing cores. In addition, a SoC design variant is presented based on recently available FPGA technology with integrated hardwired processor, which is capable to support also high end payload applications.
- W. J. Markiewicz, H. U. Keller, D. Titov, R. Jaumann, H. Michalik, D. Crisp, L. Esposito, S. S. Limaye, S. Watanabe, N. Ignatiev, N. Thomas. VENUS Monitoring Camera for VENUS EXPRESS. European Geosciences Union. 1st General Assembly Nice, April 2004.Google Scholar
- B. Fiethe, H. Michalik, C. Dierker, B. Osterloh, F. Gliem, W. J. Markiewicz, D. Titov, H. U. Keller. Miniaturized Data Processing Unit for Space Instruments. 54th Int. Astronautical Congress, September 2003.Google Scholar
- F. Gliem, B. Gerlach. DPUs based on COTS. On-Board Payload Data Processing Workshop, ESTEC, September 2001, 01-4.Google Scholar
- H. Michalik, S. Wolter, M. v. d. Wall, L. Hinsenkamp, B. Penné, R. Rathje. High-rate CCSDS formatter/encoder plus IDEA encryptor as a single chip solution. Acta Astronautica, Volume 58, Issue 12, June 2006.Google ScholarCross Ref
- S. Habinc (compilation). Suitability of reprogrammable FPGAs in space applications. FPGA-002-01, Report ESA contract No. 15102/01/NL/FM(SC) CCN-3, September 2002Google Scholar
- C. C. Yui, G. M. Swift, C. Carmichael, R. Koga, J. S. George. SEU Mitigation Testing of Xilinx Virtex II FPGAs. Radiation Effects Data Workshop, ISBN 0-7803-8127-0, July 2003.Google Scholar
- M. Otto. Vergleich kommerzieller Prozessoren für Instrumentenrechner. Student Thesis, TU Braunschweig, 2003.Google Scholar
- H. H. Ng. PPC405 Lockstep System on ML310. Xilinx Application Note 564, October 2004.Google Scholar
- Reconfigurable system-on-chip data processing units for space imaging instruments
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