skip to main content
10.1145/1114252.1114260acmotherconferencesArticle/Chapter ViewAbstractPublication PagesmodConference Proceedingsconference-collections
Article

Accelerating database operators using a network processor

Published:12 June 2005Publication History
First page image

References

  1. {1} A. Agarwal, J. Kubiatowicz, D. Kranz, B.-H. Lim, D. Yeung, G. D'Souza, and M. Parkin. Sparcle: An evolutionary processor design for large-scale multiprocessors. IEEE Micro, pages 48-61, June 1993. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. {2} A. Ailamaki, D. J. DeWitt, M. D. Hill, and M. Skounakis. Weaving relations for cache performance. In Proceedings of 27th International Conference on Very Large Data Bases, September 11-14, 2001, pages 169-180, 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. {3} A. Ailamaki, D. J. DeWitt, M. D. Hill, and D. A. Wood. DBMSs on a modern processor: Where does time go? In Proceedings of 25th International Conference on Very Large Data Bases, September 7-10, 1999, pages 266-277, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. {4} G. Alverson, R. Alverson, D. Callahan, B. Koblenz, A. Porterfield, and B. Smith. Exploiting heterogeneous parallelism on a multithreaded multiprocessor. In Proceedings of the 6th ACM International Conference on Supercomputing, July 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. {5} N. Bandi, C. Sun, A. E. Abbadi, and D. Agrawal. Hardware acceleration in commercial databases: A case study of spatial operations. In Proceedings of the 30th International Conference on Very Large Data Bases, August 31 - September 3 2004, pages 1021-1032, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. {6} P. A. Boncz, S. Manegold, and M. L. Kersten. Database architecture optimized for the new bottleneck: Memory access. In Proceedings of 25th International Conference on Very Large Data Bases, September 7-10, 1999, pages 54-65, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. {7} M. J. Carey, D. J. DeWitt, M. J. Franklin, N. E. Hall, M. L. McAuliffe, J. F. Naughton, D. T. Schuh, M. H. Solomon, C. K. Tan, O. G. Tsatalos, S. J. White, and M. J. Zwilling. Shoring up persistent applications. In Proceedings of the 1994 ACM SIGMOD International Conference on Management of Data, May 24-27, 1994., pages 383-394, 1994. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. {8} S. Chen, A. Ailamaki, P. B. Gibbons, and T. C. Mowry. Improving hash join performance through prefetching. In Proceedings of the 20th International Conference on Data Engineering, March 30 - April 2, 2004, pages 116-127, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. {9} T. M. Chilimbi, M. D. Hill, and J. R. Larus. Making pointer-based data structures cache conscious. IEEE Computer, 33(12):67-74, 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. {10} R. J. Eickemeyer, R. E. Johnson, S. R. Kunkel, M. S. Squillante, and S. Liu. Evaluation of multithreaded uniprocessors for commercial application environments. In Proceedings of the 23rd International Symposium on Computer Architecture (ISCA), pages 203-212, 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. {11} N. K. Govindaraju, B. Lloyd, W. Wang, M. Lin, and D. Manocha. Fast computation of database operations using graphics processors. In Proceedings of the ACM SIGMOD International Conference on Management of Data, June 13-18, 2004, pages 215-226, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. {12} Intel Corporation. Intel IXP2400 Network Processor: Hardware Reference Manual. Intel Press, May 2003.Google ScholarGoogle Scholar
  13. {13} E. J. Johnson and A. R. Kunze. IXP2400/2800 Programming: The Complete Microengine Coding Guide. Intel Press, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. {14} M. Karlsson, F. Dahlgren, and P. Stenström. A prefetching technique for irregular accesses to linked data structures. In Proceedings of the 6th International Symposium on High-Performance Computer Architecture, 8-12 January 2000, pages 206-217, 2000.Google ScholarGoogle Scholar
  15. {15} K. Keeton, D. A. Patterson, Y. Q. He, R. C. Raphael, and W. E. Baker. Performance characterization of a quad pentium pro smp using oltp workloads. In Proceedings of the 25th Annual International Symposium on Computer Architecture, June 27 - July 1, 1998, pages 15-26, 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. {16} M. Kitsuregawa, H. Tanaka, and T. Moto-Oka. Application of hash to data base machine and its architecture. New Generation Comput., 1(1):63-74, 1983.Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. {17} J. L. Lo, L. A. Barroso, S. J. Eggers, K. Gharachorloo, H. M. Levy, and S. S. Parekh. An analysis of database workload performance on simultaneous multithreaded processors. In Proceedings of the 25th Annual International Symposium on Computer Architecture, June 27 - July 1, 1998, pages 39-50, 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. {18} C.-K. Luk and T. C. Mowry. Compiler-based prefetching for recursive data structures. In Proceedings of the 7th International Conference on Architectural Support for Programming Languages and Operating Systems, October 1-5, 1996, pages 222-233, 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. {19} S. Manegold, P. A. Boncz, and M. L. Kersten. What happens during a join? Dissecting cpu and memory optimization effects. In Proceedings of 26th International Conference on Very Large Data Bases, September 10-14, 2000, pages 339-350, 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. {20} P. Ranganathan, K. Gharachorloo, S. V. Adve, and L. A. Barroso. Performance of database workloads on shared-memory systems with out-of-order processors. In Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, October 3-7, 1998, pages 307-318, 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. {21} A. Roth and G. S. Sohi. Effective jump-pointer prefetching for linked data structures. In Proceedings of the 26th Annual International Symposium on Computer Architecture, May 2-4, 1999, pages 111-121, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. {22} C. Sun, D. Agrawal, and A. E. Abbadi. Hardware acceleration for spatial selections and joins. In Proceedings of the 2003 ACM SIGMOD International Conference on Management of Data, June 9-12, 2003, pages 455-466, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library

Recommendations

Comments

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Sign in
  • Published in

    cover image ACM Other conferences
    DaMoN '05: Proceedings of the 1st international workshop on Data management on new hardware
    June 2005
    275 pages
    ISBN:9781450378031
    DOI:10.1145/1114252

    Copyright © 2005 ACM

    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 12 June 2005

    Permissions

    Request permissions about this article.

    Request Permissions

    Check for updates

    Qualifiers

    • Article

    Acceptance Rates

    Overall Acceptance Rate80of102submissions,78%

PDF Format

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader