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Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits

Published:08 August 2005Publication History

ABSTRACT

In this paper we model (numerically and analytically) and analyze sub-threshold, gate-to-channel tunneling, and edge direct tunneling leakage in Double Gate (DG) devices. We compare the leakage of different DG structures, namely, doped body symmetric device with polysilicon gates, intrinsic body symmetric device with metal gates and intrinsic body asymmetric device with different front and back gate material. It is observed that, use of (near-mid-gap) metal gate and intrinsic body devices significantly reduces both the total leakage and its sensitivity to parametric variations in DG circuits

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        cover image ACM Conferences
        ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and design
        August 2005
        400 pages
        ISBN:1595931376
        DOI:10.1145/1077603

        Copyright © 2005 ACM

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        New York, NY, United States

        Publication History

        • Published: 8 August 2005

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